Variable Resistance Memory Stacked Layers Multi-Bit Storage

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Solution Overview

Problem

Current variable resistance memory devices, such as ReRAM and PCRAM, face challenges in implementing multi-level cells due to the limited number of resistance states available in most variable resistance materials, making it difficult to store two or more-bit data as integration levels increase.

Innovation Solution

A variable resistance memory device is designed with multiple variable resistance material layers, each having distinct set and reset voltages, allowing for the creation of multiple resistance states by stacking these layers between electrodes, enabling the storage of multi-bit data by controlling the voltage conditions across these layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a single variable resistance material layer is used, then the device structure is simple, but the device can only store one-bit data due to limited resistance states

Engineering Contradiction:
Improvedata storage capacityVSAvoiddevice structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent divides the single variable resistance material layer into multiple stacked layers (first variable resistance material layer and second variable resistance material layer). Each layer can independently switch between high and low resistance states, enabling the combination of states to represent multi-bit data (00, 01, 10, 11), thus increasing storage capacity from 1 bit to 2 bits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-layer structure to a multi-layer stacked structure, adding the vertical dimension. By stacking variable resistance material layers between shared electrodes, the device achieves multi-bit storage capability through the combination of resistance states across multiple layers, effectively utilizing the vertical stacking dimension to increase storage density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple variable resistance material layers are stacked, then multi-bit data storage is enabled, but the device structure becomes more complex

Engineering Contradiction:
Improvedata storage capacityVSAvoiddevice structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges multiple variable resistance material layers between shared electrodes (first electrodes and second electrode). The first and second variable resistance material layers share common electrodes, creating a combined structure where each layer contributes to the overall resistance state. This merging approach enables multi-bit storage while maintaining a compact integrated structure rather than using separate independent cells.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The stacked variable resistance material layers serve multiple functions: each layer can independently store one bit of data, and their combined states represent two-bit data. The shared electrodes serve both to apply voltages to individual layers and to read the combined resistance state, achieving multi-functionality that increases storage capacity without proportionally increasing electrode complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If variable resistance materials with only two resistance states are used, then the material selection is simple, but multi-level cell implementation is difficult

Engineering Contradiction:
Improvemulti-level cell capabilityVSAvoidresistance states
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent segments the data storage function across multiple variable resistance material layers. While each individual layer maintains its simple two-state characteristic (high resistance or low resistance), the segmentation of the overall storage function across multiple layers creates combined states that enable multi-level cell capability. The combination of states from multiple layers produces more than two overall resistance states.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a composite structure by stacking multiple variable resistance material layers. This composite multi-layer structure exhibits more complex overall resistance characteristics than individual layers, enabling multi-level cell implementation. The composite structure combines the simple two-state materials into a system with multiple distinguishable resistance states through the series combination of layer states.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows the memory device to switch among multiple resistance states, effectively storing two-bit or multi-bit data, enhancing the integration density and data storage capabilities beyond the traditional two-state limitations.

Implementation Method 1

a variable resistance material layer interposed between one of the first electrodes and the second electrode... a first variable resistance material layer interposed between one of the first electrodes and the second electrode

Methodology Applied
Scientific EffectVariable resistance: Electrical Resistance

Implementation Method 2

two electrodes for applying a voltage across the variable resistance material layer... a pair of first electrodes and a second electrode interposed between the pair of first electrodes

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS8884264B2Variable resistance memory device
Publication Date: 2014.11.11 SK HYNIX INC
  • US8884264B2 patent drawing
  • US8884264B2 patent drawing
  • US8884264B2 patent drawing

AI summary

A variable resistance memory device includes: a pair of first electrodes and a second electrode interposed between the pair of first electrodes; a first variable resistance material layer interposed between one of the first electrodes and the second electrode; and a second variable resistance material layer interposed between the other of the first electrodes and the second electrode, wherein the pair of first electrodes are electrically connected to each other, and a first set voltage and a first reset voltage of the first variable resistance material layer are different from a second set voltage and a second reset voltage of the second variable resistance material layer, respectively.