Variable Resistance Memory Device with Tapered Phase Change Pattern
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Solution Overview
Problem
Next-generation semiconductor memory devices require improved non-volatile storage solutions with low power consumption and high performance, as existing volatile memory devices lose data upon power interruption, while current non-volatile devices face challenges in maintaining resistance changes without power.
Innovation Solution
A variable resistance memory device is designed with a substrate, conductive lines, phase change patterns, and bottom electrodes, where the phase change patterns have a specific geometry to minimize resistance distribution at the interface, allowing for reversible phase changes between crystalline and amorphous states without power, using materials like Te, Se, and Ge compounds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If phase change patterns with uniform width are used, then manufacturing process is simpler, but resistance distribution at the interface increases
Solution Approach 1:
The phase change pattern employs an asymmetric geometry where the width in the first direction decreases from the upper surface toward the lower surface. This asymmetric design optimizes the interface contact area with the bottom electrode, thereby minimizing resistance distribution while managing the increased manufacturing complexity through precise patterning processes.
2Reliability
If volatile memory devices are used, then data access speed is fast, but data is lost when power is interrupted
Solution Approach 1:
The memory device utilizes phase change patterns that can transition between crystalline and amorphous phases to represent binary data states. These phase changes are non-volatile, allowing data to be retained without continuous power supply, thus achieving both data retention reliability and reduced power consumption compared to volatile memory.
3Reliability
If resistance changes are maintained without power, then non-volatile storage is achieved, but resistance distribution at interface increases
Solution Approach 1:
The phase change pattern is designed with varying width in the vertical dimension (decreasing width from upper to lower surface), which optimizes the interface contact area with the bottom electrode. This dimensional variation minimizes resistance distribution at the interface while maintaining stable resistance changes for non-volatile storage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves non-volatile data storage with low power consumption and high performance by maintaining resistance changes without power interruption, enabling efficient data retention and retrieval.
Implementation Method 1
the phase change patterns have a specific geometry to minimize resistance distribution at the interface, allowing for reversible phase changes between crystalline and amorphous states without power
Data Source
AI summary
A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.