Variable Resistance Memory Device Vertical Electrode Fabrication
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Solution Overview
Problem
The complexity and high cost of fabrication processes for cross point cell array structures in variable resistance memory devices, which require multiple mask processes to pattern bit lines and word lines to a minimum critical dimension, hinder the integration and cost-effectiveness of these devices.
Innovation Solution
A variable resistance memory device with a three-dimensional structure featuring vertically stacked memory cells, utilizing vertical and horizontal electrodes with a variable resistance layer in between, and a simplified fabrication method that reduces the number of mask processes by alternately stacking interlayer dielectric and sacrificial layers, forming trenches, and removing sacrificial layers to create electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If cross point cell array structure is used to improve integration degree, then memory cell density increases, but fabrication complexity and cost increase due to multiple mask processes
Solution Approach 1:
The patent transitions from planar bit lines and word lines to a three-dimensional structure with vertical electrodes extending through multiple interlayer dielectric layers. This vertical stacking enables memory cells to be arranged in multiple tiers, significantly increasing storage density without requiring additional mask processes for patterning crossing conductors in the plane.
Solution Approach 2:
The memory structure is divided into discrete vertical electrode segments separated by interlayer dielectric layers. Each vertical electrode can be independently formed and connected to horizontal electrodes at different levels, allowing modular construction of memory cells and simplifying the fabrication process compared to continuous planar conductor networks.
2Manufacturing precision
If multiple mask processes are repeated to pattern bit lines and word lines, then minimum critical dimension is achieved, but fabrication time and cost increase
Solution Approach 1:
The patent performs preliminary patterning of vertical electrodes through the interlayer dielectric layers before forming the horizontal electrodes. This preliminary structuring establishes the vertical conductor positions once, and subsequent horizontal electrode formation simply connects to these pre-positioned vertical electrodes, eliminating the need for repeated mask processes to create crossing patterns.
Solution Approach 2:
The interlayer dielectric layers serve as intermediary structures that isolate and organize vertical electrodes at different levels. These dielectric layers enable the vertical electrodes to be formed once and then serve as common connections for multiple horizontal electrodes, reducing the number of patterning steps required.
Data Source
AI summary
A variable resistance memory device includes vertical electrodes vertically projecting from a substrate, first horizontal electrodes stacked along the vertical electrodes, second horizontal electrodes stacked along the vertical electrodes, and a variable resistance layer interposed between the vertical electrodes and the first and second horizontal electrodes, wherein the first and second horizontal electrodes are arranged in directions crossing with each other.