Variable Resistance Memory Cell Wiring Groove Etching Protection
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Solution Overview
Problem
The manufacturing process for nonvolatile memory devices, such as ReRAM, faces challenges due to the deterioration of titanium nitride and polysilicon films during etching, leading to increased costs and oxidation issues, which are also applicable when adapting methods from field-programmable ROM to ReRAM.
Innovation Solution
A nonvolatile memory device is manufactured using a method that forms first and second wires in grooves within insulating films, with variable resistance memory cells embedded between them, allowing for reduced exposure to etching gases and oxidation, and eliminating the need for additional lithography steps for patterning the memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the laminated layer of titanium nitride film and polysilicon film is formed in the columnar structure and etched, then the memory cell structure is formed, but the etching gas and liquid come into contact with the side of the laminated layer causing deterioration of film characteristics
Solution Approach 1:
A protective film is introduced as an intermediary layer between the etching process and the laminated layer of titanium nitride and polysilicon films. This protective film prevents direct contact between etching gases/liquids and the sensitive film surfaces, thereby avoiding deterioration while still allowing the etching process to form the required columnar memory cell structure.
Solution Approach 2:
The patent converts the potentially harmful etching process into a beneficial formation process by using the etching gas and liquid to selectively remove material and define the columnar structure, while the protective film simultaneously prevents damage to the laminated layer characteristics. The harmful exposure is transformed into a controlled structural definition process.
2Ease of manufacture
If silicon oxide film is filled in the spaces in the columnar structure, then the structure is completed, but the titanium nitride film and polysilicon film are oxidized
Solution Approach 1:
The protective film is formed on the laminated layer before the silicon oxide filling process begins. This preliminary protective coating prevents oxidation of the titanium nitride and polysilicon films during the subsequent silicon oxide deposition and filling operations, allowing the structure to be completed without compromising film integrity.
3Manufacturing precision
If additional lithography process is added for patterning the laminated layer into columnar structure, then the memory cell pattern is achieved, but the manufacturing cost increases
Solution Approach 1:
The patent merges the patterning function into the existing lithography processes used for forming the lower and upper wiring layers. The same lithography steps that define the wire patterns also define the columnar memory cell structures in the laminated layer, eliminating the need for separate dedicated lithography processes and reducing manufacturing costs.
Solution Approach 2:
The lithography process is given multiple functions: it simultaneously patterns the lower wiring layer, patterns the upper wiring layer, and patterns the laminated layer into the columnar structure. This multi-functional use of the lithography equipment and process reduces the total number of processing steps and associated costs.
Data Source
AI summary
A nonvolatile memory device according to an embodiment of the present invention includes: a first wire embedded in a first wiring groove extending in an X direction formed in a first interlayer insulating film; a second interlayer insulating film formed above the first interlayer insulating film; a second wire embedded in a second wiring groove extending in a Y direction formed in the second interlayer insulating film; and a variable resistance memory cell including a variable resistive layer and a rectifying layer arranged to be held between the first wire and the second wire in a position where the first wire and the second wire intersect. A dimension in a plane perpendicular to a thickness direction of the variable resistance memory cell is specified by widths of the first and second wires.