Variable Resistance Memory Write Current Control
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Solution Overview
Problem
There is a demand to increase the number of rewrite operations in variable resistance memory elements while ensuring stable resistance change operations, which requires consideration of the transitional state for stable resistance change operations.
Innovation Solution
A variable resistance non-volatile memory device with a memory cell array, a write circuit, and a control circuit, where the write circuit includes a source line driver circuit and a bit line driver circuit, allowing controlled current flow to prevent unintended overcurrent and stabilize the resistance change operation by managing first and second write currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high current is applied to change the memory element to a low resistance state, then the resistance change operation is initiated, but overshoot current occurs causing instability and potential damage
Solution Approach 1:
The write operation is divided into two distinct phases: a first write operation with a first write current to initiate the resistance change, and a second write operation with a second write current to complete the transition. This segmentation allows each phase to be optimized independently, preventing overshoot current while maintaining reliable resistance change operation.
Solution Approach 2:
The first write operation is performed as a preliminary action before the second write operation. By initially applying a first write current to start the resistance change and then following with a second write current, the system prepares the memory element in a controlled manner, preventing sudden current overshoot that would occur with a single high-current pulse.
2Duration of action of stationary object
If multiple write operations are performed to increase rewrite durability, then the longevity of the memory element improves, but the need for precise current control increases complexity
Solution Approach 1:
The write circuit dynamically adjusts the current magnitude based on the operation phase. The source line driver circuit applies different current levels (first write current vs. second write current) at different times during the write operation, enabling precise control over the resistance change process while supporting multiple rewrite operations for improved longevity.
Solution Approach 2:
The control circuit monitors the state of the memory element and determines when to transition from the first write operation to the second write operation. This feedback mechanism ensures that the two-stage write process is executed only when needed, preventing unnecessary complexity while achieving the desired resistance change and improving rewrite durability through controlled repeated operations.
3Productivity
If a single high current pulse is used for writing, then the write operation is simple and fast, but unintended overcurrent damages the memory element characteristics
Solution Approach 1:
The write operation is structured as two periodic phases: the first write operation applies a first write current for a first period to initiate resistance change, and the second write operation applies a second write current for a second period to complete the transition. This periodic two-stage approach maintains write speed while preventing overcurrent damage by controlling the current magnitude at each phase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables stable continuation of resistance change operations, enhancing the longevity of both the variable resistance non-volatile memory element and the memory device by preventing overcurrent and maintaining consistent characteristics.
Implementation Method 1
a variable resistance non-volatile memory element that is non-volatile and variable-resistance, and reversibly changes between a low resistance state and a high resistance state
Implementation Method 2
When carrying out a write operation of changing the memory element to the low resistance state, the control circuit performs, on the source line driver circuit, (i) a first control for allowing a first write current to flow through the memory element
Data Source
AI summary
A variable resistance non-volatile memory device includes a memory cell array including memory cells, a write circuit, and a control circuit. Each memory cell includes a memory element that is a non-volatile and variable-resistance memory element, and a cell transistor. The write circuit includes a source line driver circuit connected to the cell transistor and a bit line driver circuit connected to the memory element. When performing a write operation of changing the memory element to a low resistance state, the control circuit performs control for allowing current having a first current value to flow through the memory element, and subsequently performs control for allowing current having a second current value to flow through the memory element. The second current value is greater than the largest value of overshoot current flowing through the memory element after the start of the changing of the memory element to the low resistance state.