Variable Resistance SRAM Cell for Non-Volatile Data Retention
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Solution Overview
Problem
Static random access memories (SRAMs) experience increased power consumption during power-off due to the need for backup power to retain data, which is undesirable in portable electronic devices.
Innovation Solution
A semiconductor memory device with a memory cell configuration that includes variable resistance elements connected between storage nodes and write transfer transistors, allowing data to be stored non-volatilely without requiring backup power by using set and reset operations of the resistance elements to maintain data states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If backup power is supplied to SRAM at power-off to retain data, then data retention is improved, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by setting the resistance of the resistance element to a first resistance value before power-off occurs. This pre-configured state allows the memory cell to maintain data without backup power, as the resistance element's state is established in advance to preserve the stored information during power-off conditions.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the resistance of the resistance element between different resistance values (first resistance value for data retention, second resistance value for other operations). This parameter variation enables the same component to serve multiple functions: maintaining data during power-off while allowing normal read/write operations when powered.
2Speed
If SRAM is used instead of DRAM, then operation speed is improved, but power consumption at power-off increases due to backup power requirements
Solution Approach 1:
The resistance element serves multiple functions: it acts as a load transistor in normal SRAM operation, enabling fast read/write operations, and simultaneously functions as a non-volatile storage element during power-off conditions. This multi-functionality allows the SRAM to maintain its speed advantage while eliminating the need for backup power.
Solution Approach 2:
By changing the resistance parameter of the resistance element based on operational mode (normal operation vs. power-off retention), the patent enables the SRAM to achieve both fast operation when powered and data retention without backup power, resolving the contradiction between speed and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables SRAMs to maintain data in a non-volatile state without backup power, reducing power consumption during power-off and allowing for faster data processing speeds due to dual-port access capabilities.
Implementation Method 1
A variable resistance element having a resistance which is changed according to a direction of a bias applied between both terminals
Data Source
AI summary
According to one embodiment, there is provided a semiconductor memory device including a memory cell. The memory cell includes a first driving transistor, a first load transistor, a first read transfer transistor, a first write transfer transistor, a second driving transistor, a second load transistor, a second read transfer transistor, a second write transfer transistor, and one or more variable resistance elements. The one or more variable resistance elements has resistance that changes depending on a direction of a bias applied to both terminals. The one or more variable resistance elements are arranged in at least one of a portion between a first storage node and a first write transfer transistor and a portion between a second storage node and a second write transfer transistor.