Variable Resistive Memory Pillar with Nested Resistance States

The patent implements a nested structure where a first resistive element is positioned inside a second resistive element, both sharing a common conductive pillar. This nesting approach allows multiple storage elements to occupy overlapping spatial volumes, effectively increasing storage capacity without proportionally increasing device footprint or fabrication complexity.

The patent transitions from planar 2D arrangement of resistive elements to a 3D configuration where elements are stacked vertically along a conductive pillar. The first and second resistive elements are positioned at different heights (first and second directions respectively), enabling multi-layer storage that increases capacity while maintaining compact form factor and simplifying the interconnection architecture.

The conductive pillar serves multiple functions simultaneously: it acts as a common electrode for both the first and second resistive elements, provides structural support for the nested configuration, and enables electrical connection to multiple storage layers. This multi-functionality reduces the number of separate components and interconnections needed, thereby lowering manufacturing precision requirements while maintaining high integration density.

By nesting the first resistive element within the second resistive element around a shared conductive pillar, the patent reduces the number of discrete alignment operations required compared to separate side-by-side elements. The concentric arrangement naturally aligns the elements along the pillar axis, simplifying the manufacturing process and reducing precision requirements.