Variable Resistor On-Die Termination Circuit for Signal Reflection Noise
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Solution Overview
Problem
Current nonvolatile semiconductor memory devices face challenges in optimizing processing performance due to signal reflection noise, which degrades signal quality and increases processing times during write and read operations.
Innovation Solution
Incorporating an on-die termination (ODT) circuit with variable resistors, controlled by a control circuit that adjusts resistance based on enabling signals, to selectively enable or disable the ODT circuit depending on operation modes, thereby reducing signal reflection and optimizing ODT circuit usage during write and read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If ODT circuit is enabled during write operations, then signal reflection noise is reduced, but processing time increases due to unnecessary ODT circuit operation
Solution Approach 1:
The ODT circuit's resistance value is dynamically adjusted based on the operation state. During write operations, the ODT circuit is disabled (high impedance state) to avoid increasing processing time. During read operations, the ODT circuit is enabled with optimized resistance values to reduce signal reflection noise. This dynamic switching resolves the contradiction by adapting the ODT circuit's state to the specific operation requirements.
Solution Approach 2:
The resistance value of the ODT circuit is changed based on operation mode. A control circuit receives operation state information and adjusts the ODT resistance parameter accordingly - setting it to a high impedance state during writes and to optimized values during reads. This parameter change allows the system to eliminate harmful signal reflection during reads while avoiding the time penalty during writes.
2Reliability
If ODT circuit is enabled during read operations, then signal quality is improved, but processing capability is reduced due to extended processing times
Solution Approach 1:
The ODT circuit implements dynamic resistance adjustment during read operations. The control circuit receives read operation signals and adjusts the ODT resistance to optimized values that maximize signal quality while minimizing the impact on processing speed. This dynamic adaptation allows the system to maintain high signal quality without unnecessarily extending processing times.
Solution Approach 2:
The ODT resistance parameter is optimized and changed based on the read operation state. By adjusting the resistance value to match the specific read operation requirements, the system improves signal quality and reduces reflection noise while keeping the processing time penalty minimal. The control circuit automatically selects appropriate resistance values to balance signal quality and processing speed.
3Device complexity
If fixed resistance ODT circuit is used, then circuit design is simplified, but processing performance cannot be optimized for different operation modes
Solution Approach 1:
The ODT circuit transitions from a fixed resistance design to a dynamic resistance adjustment design. A control circuit monitors the operation state and automatically adjusts the ODT resistance value in real-time. This dynamic capability allows the circuit to be optimized for both write and read operations, significantly improving processing performance despite the increased circuit complexity. The performance gain outweighs the additional circuit elements required.
Solution Approach 2:
The ODT resistance parameter is made variable instead of fixed. The control circuit changes the resistance value based on operation mode - using optimized values for reads and disabling (high impedance) during writes. This parameter variability enables the system to achieve optimal processing performance for different operation types, resolving the trade-off between circuit simplicity and processing performance optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves processing capability by reducing noise from signal reflection, enhancing signal quality, and minimizing processing times by optimizing ODT circuit operation based on the specific operation state of the memory system.
Implementation Method 1
an on-die termination circuit connected to at least one of the terminals and having a variable resistor, and a control circuit. The control circuit is configured to enable the on-die termination circuit in response to an enabling signal to enable the on-die termination circuit, with a resistance of the variable resistor at different values depending on whether a control signal is asserted or deasserted when the enabling signal is received
Data Source
AI summary
A memory device includes a nonvolatile semiconductor memory cell array, a plurality of terminals through which control signals are received to control the memory device, an on-die termination circuit connected to at least one of the terminals and having a variable resistor, and a control circuit. The control circuit is configured to enable the on-die termination circuit in response to an enabling signal to enable the on-die termination circuit, with a resistance of the variable registorresistor at different values depending on whether a control signal is asserted or deasserted when the enabling signal is received.