Variable-Resolution A/D Converter for Lower-Power Image Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing A/D converters in image sensors face challenges in reducing power consumption while maintaining performance, particularly in portable devices where resolution and processing time need to be improved, and circuit size minimized.
Innovation Solution
The A/D converter switches resolution from m bits to n bits by partially stopping clock signals or gray code counters at predetermined times, using a comparison unit with a ramp waveform reference voltage and time quantization to decode phase information from multiple clock signals, allowing for dynamic resolution adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the frequency is raised to improve resolution, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the counter operation dynamic rather than static. The counter is selectively operated or stopped based on the input signal characteristics and required resolution. This allows the system to adapt its operational state (running or stopped) to match the actual measurement needs, thereby reducing unnecessary power consumption while maintaining required measurement precision.
Solution Approach 2:
The patent changes the operational parameter of the counter from a fixed state to a variable state. By controlling whether the counter operates or stops based on signal conditions and resolution requirements, the system dynamically adjusts its power consumption and measurement precision parameters to optimize performance for different operating conditions.
2Productivity
If the processing time is reduced to improve productivity, then productivity is improved, but measurement precision deteriorates
Solution Approach 1:
The patent applies partial action by selectively operating the counter only when necessary rather than continuously. The counter is stopped during periods when high-resolution measurement is not required, performing only the necessary counting operations. This reduces overall processing time and power consumption while maintaining measurement precision when actually needed.
3Ease of manufacture
If the circuit size is reduced to improve ease of manufacture, then ease of manufacture is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the counter and control circuitry to perform multiple functions. The same counter structure is used for both high-resolution and low-resolution operations, and the control logic manages different operational modes (operated vs. stopped states). This multi-functionality reduces the need for separate circuits for different resolution modes, thereby reducing overall circuit size while managing complexity through unified design.
Data Source
AI summary
An A/D converter switches resolution of m bits to resolution of n bits smaller than the m bits at a predetermined time.


