Variable-Resolution HPM Delay Line for Adaptive Voltage Scaling
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Solution Overview
Problem
Existing adaptive voltage scaling (AVS) systems lack the ability to efficiently adjust supply voltage with high resolution, leading to suboptimal performance and power consumption in systems with varying processing loads.
Innovation Solution
A hardware performance monitor (HPM) with variable resolution is introduced, featuring non-linearly spaced taps in a delay line that adjusts supply voltage by providing finer resolution near the target propagation delay and coarser resolution farther away, allowing for precise control of supply voltage adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If uniform resolution taps are used in the delay line, then the measurement coverage is comprehensive, but the measurement precision near the target delay is insufficient and the device complexity increases
Solution Approach 1:
The patent applies local quality by implementing non-uniform tap spacing where the resolution is locally optimized near the target delay point. Taps are spaced closer together in the critical region around the target delay to provide fine-grained measurement precision, while taps farther away are spaced more coarsely. This localized refinement of measurement quality achieves high precision where needed without uniformly increasing complexity across the entire delay line.
Solution Approach 2:
The patent implements dynamic adaptation by adjusting the effective resolution of the delay line based on the operating conditions. The HPM dynamically selects and weights different tap measurements depending on how close they are to the target delay, effectively changing the measurement resolution dynamically rather than using a fixed uniform structure throughout.
2Productivity
If high resolution voltage control is implemented, then the performance optimization is improved, but the power consumption increases
Solution Approach 1:
The patent applies partial action by implementing high-resolution voltage control only in the critical region near the target delay where it is most needed for performance optimization. Rather than maintaining high resolution across the entire voltage range, the system uses coarse control for voltages far from the target and fine-grained control only when approaching and around the target delay, thereby reducing overall power consumption while maintaining performance.
3Measurement precision
If more delay cells are added to the delay line, then the measurement resolution is improved, but the area and complexity of the HPM increase
Solution Approach 1:
The patent applies local quality by concentrating delay cells and taps in the critical region near the target delay where high measurement precision is needed. Rather than uniformly distributing delay cells throughout the entire delay line, the design places finer-grained delay elements locally around the target point while using coarser spacing elsewhere, achieving high local resolution without proportionally increasing the total HPM area.
Data Source
AI summary
An apparatus includes a delay line having multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal through the delay cells. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the delay line and to output sampled values. The delay line has (i) a finer resolution closer to a target tap and (ii) a coarser resolution farther away from the target tap on each side of the target tap. For example, taps nearer the target tap can be closer to each other in order to support the finer resolution, and taps farther from the target tap can be farther apart from each other in order to support the coarser resolution. The apparatus can further include an encoder configured to encode the sampled values in order to generate an encoded value.