Variable-Resolution Neural Network Processing for Power Efficiency
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Solution Overview
Problem
Current neural network processors face inefficiencies in performing operations due to the need to process both activation and weight bits, leading to unnecessary computations and increased power consumption.
Innovation Solution
A neural network apparatus and method that determines whether operations should be performed on specific bits of activation and weight inputs, allowing for variable-resolution operations by controlling the timing of bit processing, thereby reducing unnecessary computations and optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If operations are performed on all bits of activation and weight inputs, then complete computation accuracy is achieved, but power consumption increases and processing efficiency decreases
Solution Approach 1:
The patent segments the bit processing into variable-resolution operations where different bit positions are processed selectively based on their contribution to the final result. Less significant bits are processed with lower precision or skipped entirely, while more significant bits receive full processing attention. This segmentation allows the system to maintain adequate computation accuracy for critical bits while reducing power consumption by avoiding full-precision processing of all bits.
Solution Approach 2:
The patent applies partial action by performing operations on only the necessary subset of bits rather than all bits. The system determines the optimal resolution for each operation dynamically, performing full precision processing only when needed and using reduced precision for other cases. This partial processing approach maintains sufficient accuracy for the application while significantly reducing the computational burden and power consumption associated with processing all bits at full precision.
2Measurement precision
If operations are performed on all bits of activation and weight inputs, then complete computation accuracy is achieved, but processing speed decreases due to unnecessary computations
Solution Approach 1:
The patent segments the computation process into variable-resolution stages, dividing the bit processing into necessary and optional components. By segmenting the operations to process only the most significant bits in full detail and handling less significant bits with reduced precision or skipping them entirely, the system achieves faster processing speeds while maintaining sufficient accuracy for the application.
Solution Approach 2:
The patent implements skipping by identifying and bypassing unnecessary bit operations that would not significantly impact the final result. The system dynamically determines which bit positions can be skipped based on the current computation context and accuracy requirements, rushing through these less critical operations to maintain high processing speed while still achieving adequate computation accuracy for the neural network application.
3Device complexity
If fixed-resolution operations are used, then implementation is simpler, but efficiency is reduced due to inability to adapt to varying computation requirements
Solution Approach 1:
The patent introduces dynamic variable-resolution operations that can adapt their precision level based on the specific computation requirements. Rather than using fixed-resolution arithmetic, the system dynamically adjusts the number of bits processed and the level of precision applied to each operation based on factors such as the significance of the operands and the required output accuracy. This dynamic approach improves processing efficiency by avoiding unnecessary high-precision operations while maintaining adequate accuracy when needed.
Solution Approach 2:
The patent changes the resolution parameter of arithmetic operations dynamically based on computation context. The system adjusts parameters such as the number of significant bits to process, the precision level for intermediate results, and the truncation or rounding thresholds according to the specific operation being performed. This parameter adaptation allows the neural network processor to achieve higher efficiency by using lower precision when sufficient and full precision only when necessary, rather than being constrained to fixed-resolution arithmetic throughout.
Data Source
AI summary
A neural network apparatus that is configured to process an operation includes neural network circuitry configured to receive a first input of an n-bit activation, store a second input of an m-bit weight, perform a determination whether to perform an operation on an ith bit of the first input and a jth bit of the second input, output an operation value of an operation performed on the ith bit of the first input and the jth bit of the second input based on the determination, and produce an operation value of the operation based on the determination.