Variable Scaling Fixed-Point Processor for Iterative Calculation Precision
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Solution Overview
Problem
Existing numerical computation formats, either floating-point or fixed-point, are not ideally suited for iterative numerical calculations on specialized hardware, as they either waste resources or are prone to errors due to range limitations, leading to inefficiencies and inaccuracies.
Innovation Solution
A method and processor configuration that performs iterative calculations in a fixed-point format with a selectively variable scaling factor to prevent overflow and minimize underflow, allowing for flexible and accurate processing while reducing logic area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If floating-point format is used for iterative numerical calculations, then precision and range are improved, but logic area and resource consumption increase
Solution Approach 1:
The patent applies dynamics by making the scaling factor variable rather than fixed. The scaling factor is adjusted dynamically based on the magnitude of calculation results at each iterative step, allowing the fixed-point format to adapt its precision characteristics to match the actual data range being computed. This dynamic adjustment enables the system to achieve floating-point-like precision where needed while maintaining fixed-point efficiency elsewhere.
Solution Approach 2:
The patent changes the parameter of scaling factor from a static value to a dynamically adjustable value. By modifying the scaling factor parameter based on the magnitude of intermediate results, the system can optimize the balance between precision and resource usage at each computational step, effectively resolving the contradiction between maintaining high precision and minimizing logic area.
2Device complexity
If fixed-point format with constant scaling factor is used, then logic area is reduced, but overflow and underflow errors increase
Solution Approach 1:
The patent implements feedback by monitoring the magnitude of calculation results at each iterative step and using this information to adjust the scaling factor for subsequent steps. This feedback mechanism detects when results approach overflow or underflow thresholds and automatically modifies the scaling factor to prevent these errors, thereby maintaining calculation reliability while using a compact fixed-point format.
Solution Approach 2:
The system transitions from a static fixed-point format to a dynamic fixed-point format where the scaling factor changes based on the computational state. This dynamic behavior allows the system to maintain reliability by adapting to the actual data magnitude, preventing overflow and underflow errors that would occur with a constant scaling factor.
3Speed
If CPU frequency is increased to improve performance, then calculation speed is improved, but power consumption increases
Solution Approach 1:
The patent employs a specialized accelerator unit with dedicated local memory rather than relying solely on the main CPU and system memory. This accelerator performs iterative numerical calculations using a customized fixed-point format with variable scaling, completing computations faster and with less power than the general-purpose CPU would require, thereby reducing overall system power consumption while maintaining high calculation speed.
4Speed
If main RAM speed is increased to match CPU speed, then memory wall is reduced, but system cost and complexity increase
Solution Approach 1:
The patent implements a nested memory architecture where the accelerator unit has its own dedicated local memory embedded within it. This local memory is nested within the accelerator, which in turn is connected to the main system memory. This nested structure allows the accelerator to access data rapidly from its local memory without requiring the main RAM to operate at CPU speeds, thereby avoiding the need to increase system memory complexity and cost while still achieving fast access for critical computations.
Data Source
AI summary
There is provided a method of processing an iterative computation on a computing device comprising at least one processor. Embodiments of the method comprises performing, on a processor, an iterative calculation on data in a fixed point numerical format having a scaling factor, wherein the scaling factor is selectively variable for different steps of said calculation in order to prevent overflow and to minimize underflow. By providing such a method, the reliability, precision and flexibility of floating point operations can be achieved whilst using fixed point processing logic. The errors which fixed-point units are usually prone to generate if the range limits are exceeded can be mitigated, whilst still providing the advantage of a significantly reduced logic area to perform the calculations in fixed point.