Variable Shift Pseudorandom Number Generator for Leak Analysis Resistance

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Solution Overview

Problem

Current pseudorandom number generators used in IC cards lack sufficient randomness, making them vulnerable to leak analysis attacks, where attackers can predict current consumption patterns and compromise data security.

Innovation Solution

A pseudorandom number generator with a shift register and a shift amount changing circuit that synchronizes signal shifting with a clock signal, allowing external control over the shift amount, thereby enhancing randomness and resistance to leak analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed shift amount is used in the LFSR, then the circuit operation is simple, but the pseudorandom number has low randomness and leak analysis resistance deteriorates

Engineering Contradiction:
Improveleak analysis resistanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the shift amount variable rather than fixed. The shift amount changing circuit dynamically adjusts the shift amount based on control signals, transforming a static system into a dynamic one. This resolves the contradiction by introducing variability that improves randomness and leak analysis resistance while adding only moderate circuit complexity through the shift amount changing circuit.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of shift amount from a fixed value to a variable parameter controlled by external control signals. This parameter change enables the pseudorandom number generator to produce different sequences based on control inputs, significantly improving randomness and resistance to leak analysis while maintaining reasonable circuit complexity through efficient control mechanisms.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If initialization is not performed, then power consumption is reduced, but the LFSR may remain in a zero state and operation check testing becomes difficult

Engineering Contradiction:
Improvepower consumptionVSAvoidoperation check testing
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The patent applies preliminary action by providing initialization capability that can be activated before operation checks. The initialization circuit prepares the LFSR in a known state when needed, enabling operation check testing without requiring continuous initialization during normal operation. This resolves the contradiction by making initialization available on-demand rather than continuous.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system allows the LFSR to maintain its state without continuous intervention, reducing power consumption during normal operation. When operation checks are needed, the initialization function is activated temporarily. This self-service approach lets the system operate efficiently most of the time while maintaining the capability to be reset when necessary.

Inventive Principle:
Principle #25Self-service

3Reliability

If the same clock signal is used for all flip flop circuits, then the circuit is simple, but the output values may be identical and randomness is insufficient

Engineering Contradiction:
Improverandomness qualityVSAvoidclock signal control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic clock control where different flip flop circuits receive clock signals with different phases or delays. This dynamic clocking strategy ensures that not all flip flops update simultaneously, creating varied output sequences that improve randomness while adding moderate complexity through clock signal management circuits.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic action with different phases for clock signals supplied to various flip flop circuits. By staggering the clocking phases, the system ensures diverse update timing across the LFSR stages, generating more random output sequences. This periodic variation in clock timing improves randomness while maintaining structured control through phase-shifted clock distribution.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8595275B2Pseudorandom number generator and data communication apparatus
Publication Date: 2013.11.26 RENESAS ELECTRONICS CORP
  • US8595275B2 patent drawing
  • US8595275B2 patent drawing
  • US8595275B2 patent drawing

AI summary

The present invention is directed to improve leak analysis resistance by improving randomness of a pseudorandom number. A pseudorandom number generator as a representative embodiment of the invention includes a shift resistor obtained by coupling a plurality of flip flop circuits and can generate a pseudorandom number by shifting signals by the shift register synchronously with a clock signal. A shift amount changing circuit capable of changing a shift amount in the shift register in accordance with a control signal supplied from the outside of the pseudorandom number generator is provided. By changing the shift amount in the shift register in accordance with a control signal supplied from the outside of the pseudorandom number generator by the shift amount changing circuit, it becomes difficult to make outputs of the pseudorandom number generator the same. By using such a pseudorandom number generator, leak analysis resistance can be improved.