Variable-Size Buffer Allocation for Memory Efficiency
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Solution Overview
Problem
Existing memory allocation approaches suffer from inefficiencies, including pre-specified allocation sizes that can be larger than needed, leading to suboptimal efficiency, long latency, and low throughput in accessing memory, particularly due to the lack of on-demand allocation and contiguous address management.
Innovation Solution
A novel buffer memory allocation scheme that separates handle allocation from memory block commitment, allowing for variable-size allocation without pre-specification, ensuring deterministic results, fast allocation, high-throughput access, and bounded latency, using a Buffer Allocator and Memory Management (BAM) mechanism that manages on-chip and off-chip memory with a unified API, hiding physical organization from clients and enabling contiguous address handling across non-contiguous physical memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If pre-specified allocation size is used for memory portions, then allocation simplicity is maintained, but memory efficiency deteriorates due to over-allocation
Solution Approach 1:
The patent implements dynamic buffer allocation where the buffer size is not fixed in advance but adapts to the actual data needs. The buffer manager dynamically adjusts the allocation size based on the specific requirements of each data transfer operation, allowing the system to optimize memory usage for each individual case rather than using a static pre-specified size for all operations.
2Productivity
If buffer allocation is not on-demand, then allocation overhead is reduced, but access latency increases and throughput decreases
Solution Approach 1:
The patent implements a buffer pooling mechanism where buffers are pre-allocated and maintained in an available pool. When a data transfer operation needs a buffer, it can immediately take one from the pool without waiting for allocation or initialization, thus eliminating allocation latency while maintaining the ability to serve multiple operations concurrently.
3Ease of operation
If physical memory organization is exposed to clients, then address mapping is simplified, but memory management flexibility deteriorates
Solution Approach 1:
The patent introduces a buffer manager as an intermediary layer between clients and physical memory. This buffer manager handles the complex address mapping and physical organization details internally, while presenting a simplified interface to clients. The buffer manager translates client requests into appropriate physical memory operations, thus shielding clients from complexity while maintaining flexibility in memory management.
Data Source
AI summary
Methods and apparatus for buffer allocation and memory management are described. A plurality of buffers of a memory may be allocated, by a memory controller, with the buffers having variable sizes. The memory controller may maintain a mapping table that associates each of a plurality of access keys to a respective one of a plurality of page addresses of a plurality of pages of the memory. Each of the buffers may respectively include one or more contiguous pages of the plurality of pages of the memory. Each page of the plurality of pages may include one or more blocks of the memory.