Variable-Size Cache Miss Ratio Curve Generation

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Solution Overview

Problem

Existing cache management methods are unable to support variable-sized data blocks, leading to inefficient memory usage and performance issues.

Innovation Solution

The method involves generating a miss ratio curve (MRC) for caches using variable-sized memory blocks by determining stack distances from a stack of counters and using these to allocate an optimal cache size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If fixed-size data blocks are used in cache, then cache management is simpler, but memory usage efficiency deteriorates

Engineering Contradiction:

Improvecache management complexityVSAvoidmemory usage efficiency

Core Design Contradiction:

Device complexityVSLoss of substance

Solution Approach 1:

The patent segments the cache into multiple regions, each dedicated to storing data blocks of a specific size. This segmentation allows the cache to efficiently handle variable-sized data blocks without requiring complex dynamic allocation mechanisms, thus maintaining simple cache management while improving memory usage efficiency.

Inventive Principle:

Principle #1Segmentation

2Loss of substance

If variable-sized data blocks are supported, then memory usage efficiency improves, but cache management complexity increases

Engineering Contradiction:

Improvememory usage efficiencyVSAvoidcache management complexity

Core Design Contradiction:

Loss of substanceVSDevice complexity

Solution Approach 1:

The cache is divided into multiple size-specific regions, each handling a particular block size. This segmentation simplifies the management of variable-sized blocks by providing dedicated storage areas, avoiding the need for complex allocation and fragmentation handling while maintaining high memory usage efficiency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each cache region is optimized for a specific block size, creating local quality variations throughout the cache structure. This allows each region to be managed independently with simple rules tailored to its specific size requirements, reducing overall management complexity while supporting variable-sized data blocks.

Inventive Principle:

Principle #3Local quality

3Productivity

If larger cache size is allocated, then cache performance improves, but memory cost increases

Engineering Contradiction:

Improvecache performanceVSAvoidmemory cost

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

By segmenting the cache into size-specific regions and using MRC analysis to determine optimal allocation for each region, the system achieves high cache performance with a smaller total cache size. This targeted approach ensures that each byte of cache memory is used efficiently for its appropriate data size, reducing overall memory cost while maintaining performance.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS12204452B2Systems and methods to generate a miss ratio curve for a cache with variable-sized data blocks

Publication Date: 2025.01.21 HUAWEI TECH CANADA CO LTD

AI summary

A method to obtain a cache miss ratio curve where a memory blocks of a cache have variable block sizes. By stacking sets of counters, each set being for a different block size, a stack distance for variable block sizes can be obtained and used to determine a miss ratio curve. Such curve can then be used to select a cache size that is appropriate for an application without requiring excessive memory. Methods can be used for batches of request, can apply limits to block sizes, and rounding for intermediary block sizes, they can be used with pruning, and their space complexity can be held constant.