Variable Spacing Lithographic Patterning via Mandrel Removal
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Solution Overview
Problem
Current lithographic patterning techniques face limitations in achieving sublithographic line pitch and width features due to the restricted tip-to-tip spacing of sidewall spacers, which restricts the formation of precise interconnect structures in semiconductor devices.
Innovation Solution
A method involving the formation of a hardmask layer, mandrels, and sidewall spacers, where the mandrels are selectively removed to pattern the hardmask and dielectric layer, allowing for the creation of trenches with variable tip-to-tip spacing greater than twice the thickness of the sidewall spacers, enabling the formation of separated wires with a dielectric layer section in between.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sidewall spacers are used for lithographic patterning, then sublithographic line pitch and width features are achieved, but the tip-to-tip spacing is restricted to less than twice the thickness of the sidewall spacers
Solution Approach 1:
The patent segments the patterning process into multiple stages: first forming sidewall spacers on mandrels to define initial features, then using those features as new mandrels to form additional sidewall spacers, and finally removing the original mandrels. This segmentation allows the tip-to-tip spacing to be determined by the feature width rather than being constrained by twice the sidewall spacer thickness, thereby resolving the contradiction between achieving sublithographic precision and maintaining spacing flexibility
Solution Approach 2:
The patent performs preliminary actions by first forming the sidewall spacers and etching the features before removing the mandrels. This preliminary formation of features using the mandrels as templates allows subsequent processes to achieve greater tip-to-tip spacing while maintaining the precision benefits of sidewall spacer-based patterning
2Ease of manufacture
If mandrels are removed after forming sidewall spacers, then the sidewall spacers can serve as etch masks, but the mandrel material must be selectively removable
Solution Approach 1:
The patent applies parameter changes by selecting mandrel materials with specific etch selectivity characteristics. The mandrel material is chosen to have high etch selectivity relative to the sidewall spacer material, allowing selective removal of the mandrel after the sidewall spacers are formed. This parameter control enables the mandrel to serve its dual function of defining feature geometry and then being selectively removed to leave the sidewall spacers as etch masks
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of integrated circuit interconnects with improved precision and flexibility in wire spacing, overcoming the limitations of existing techniques by enabling tip-to-tip distances greater than twice the width of the sidewall spacers, thus enhancing the structural integrity and electrical isolation of the wires.
Implementation Method 1
Sidewall spacers, which have a thickness less than that permitted by the current ground rules for optical lithography, are formed on the vertical sidewalls of the mandrels
Implementation Method 2
the sidewall spacers are used as an etch mask to etch an underlying hardmask and dielectric layer, for example, with a directional reactive ion etching (RIE)
Data Source
AI summary
Methods of lithographic patterning and structures formed by lithographic patterning. A hardmask layer is formed on a dielectric layer, a feature is formed on the hardmask layer, and a mandrel is formed that extends in a first direction across the first feature. The mandrel and the hardmask layer beneath the mandrel are removed to pattern the hardmask layer with the feature masking a section of the hardmask layer. After the hardmask layer is patterned, the dielectric layer is etched to form a first trench and a second trench that are separated by a section of the dielectric layer masked by the section of the hardmask layer. The first trench and the second trench are filled with a conductor layer to respectively form a first wire and a second wire that is separated from the first wire by the section of the dielectric layer.