Variable Temperature Solders for Multi-Chip Module Repackaging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Stacked semiconductor chip devices face challenges in providing adequate electrical interfaces and testing, particularly in identifying and removing defective chips without impacting the integrity of other chips or solder bumps.

Innovation Solution

The use of solder interconnect structures with different melting points allows for non-destructive removal of defective semiconductor chips by selectively heating the lower melting point solder connections, enabling the identification and removal of defective chips without affecting the higher melting point connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of repair

If conventional solder bumps with uniform melting points are used to interconnect stacked chips, then reliable electrical connections are achieved, but defective chips cannot be removed without damaging the solder bumps or other chips

Engineering Contradiction:
Improvedefective chip removalVSAvoidsolder bump integrity
Core Design Contradiction:
Ease of repairVSReliability

Solution Approach 1:

The solder interconnect structures are segmented into multiple groups with different melting points. Lower melting point solders are used for chips that may need removal, while higher melting point solders are used for permanent connections. This segmentation allows selective removal of defective chips by heating to temperatures above the lower melting point but below the higher melting point, thereby preserving the integrity of permanent connections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the stacked chip structure are assigned different solder properties based on their functional requirements. The local quality of each solder connection is optimized: lower melting point solders at positions where removal may be needed, and higher melting point solders where permanent, reliable connections are critical. This local differentiation resolves the contradiction between ease of repair and reliability.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If multiple testing steps are performed in a linear processing flow, then defective chips can be identified, but time and resources are wasted processing chips that will ultimately be found defective

Engineering Contradiction:
Improvedefect detection accuracyVSAvoidprocessing time for defective chips
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Testing is performed at multiple stages in the assembly process rather than only at the end. Chips are tested after initial mounting, and again after additional chips are stacked. This preliminary testing allows early identification of defective chips, preventing waste of time and resources on subsequent processing steps for chips that will ultimately fail.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The variable temperature solder system enables self-service removal of defective chips. When a chip is found to be defective through testing, it can be automatically removed by heating to the appropriate temperature range, without requiring complex manual intervention or affecting other chips. This streamlines the defect handling process and reduces overall processing time.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If all chips in a stack are interconnected with the same solder type, then manufacturing simplicity is maintained, but selective removal of defective chips impacts the integrity of remaining connections

Engineering Contradiction:
Improvesolder application simplicityVSAvoidnon-destructive chip removal
Core Design Contradiction:
Ease of manufactureVSEase of repair

Solution Approach 1:

The melting point parameter of the solder interconnect structures is varied across different locations in the stack. By changing this physical parameter, the system enables selective removal of chips connected with lower melting point solders while preserving connections with higher melting point solders. This parameter differentiation maintains manufacturing simplicity while enabling non-destructive repair operations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system introduces dynamic characteristics to the otherwise static solder connections. The differential melting points create a dynamic response to thermal input, allowing the connection strength to be modulated by temperature. This enables the system to transition from a static, uniform connection state to a dynamic state where specific connections can be selectively weakened and broken while others remain intact.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables early detection and removal of defective chips, preventing unnecessary processing and preserving the integrity of other chips and solder connections, facilitating efficient chip stacking and reworking.

Implementation Method 1

heating the second solder interconnect structures to or above the second melting point but below the first melting point

Methodology Applied
Scientific EffectMelting: Melting

Data Source

PatentUS9318464B2Variable temperature solders for multi-chip module packaging and repackaging
Publication Date: 2016.04.19 ADVANCED MICRO DEVICES INC
  • US9318464B2 patent drawing
  • US9318464B2 patent drawing
  • US9318464B2 patent drawing

AI summary

Various methods of mounting semiconductor chips on a substrate are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a first plurality of solder interconnect structures to a first semiconductor chip. The first solder interconnect structures have a first melting point. The first semiconductor chip may be tested. If the first semiconductor chip passes the testing, then a second semiconductor chip is coupled to the first semiconductor chip using a second plurality of solder interconnect structures that have a second melting point lower than the first melting point.