Variable-Thickness Conductive Traces Without Multi-Step Lithography

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Solution Overview

Problem

Conventional methods for forming conductive traces with different thicknesses in integrated circuit packages face challenges such as misalignment issues, increased direct current resistance, and decreased performance due to the need for multiple lithography steps, leading to non-rectilinear traces and mismatched impedances.

Innovation Solution

The use of an electroless catalyst-doped photo-imageable dielectric material on a substrate, where laser drilling creates openings of varying thicknesses for conductive traces, allowing for the deposition of conductive materials to form traces with distinct thicknesses, thereby reducing direct current resistance and enhancing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple lithography steps are used to form conductive traces with different thicknesses, then trace thickness variation is achieved, but misalignment and manufacturing complexity increase

Engineering Contradiction:

Improvetrace thickness uniformityVSAvoidlithography process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the trace formation process into two independent stages: (1) forming openings of different depths in the dielectric layer, and (2) filling these openings with conductive material. This segmentation allows each stage to be optimized independently, avoiding the misalignment issues of multiple lithography steps while achieving different trace thicknesses through selective opening depth control

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from controlling trace thickness through planar lithography parameters to controlling it through the vertical dimension (opening depth). By varying the depth of openings in the dielectric layer rather than changing lithography patterns, the method achieves trace thickness variation without additional lithography steps, thereby reducing process complexity and improving alignment precision

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If conventional methods are used to form different trace thicknesses, then trace geometry is achieved, but direct current resistance increases

Engineering Contradiction:

Improvetrace thickness controlVSAvoiddirect current resistance

Core Design Contradiction:

Manufacturing precisionVSLoss of energy

Solution Approach 1:

The patent applies local quality by allowing different regions of the substrate to have different opening depths in the dielectric layer. This enables each conductive trace to have an optimized thickness tailored to its specific electrical performance requirements, thereby minimizing direct current resistance in power-critical paths while maintaining appropriate thickness in signal paths where impedance control is paramount

Inventive Principle:

Principle #3Local quality

3Manufacturing precision

If multiple lithography steps are used, then trace thickness variation is achieved, but manufacturing time and productivity decrease

Engineering Contradiction:

Improvetrace thickness differentiationVSAvoidmanufacturing cycle time

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges multiple functions into a single lithography step: (1) defining the lateral pattern of all traces, (2) controlling the depth of openings for different traces, and (3) establishing the framework for subsequent conductive material deposition. This consolidation eliminates the need for separate lithography steps for each trace thickness variation, thereby reducing manufacturing cycle time and improving productivity while maintaining precise thickness control

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables increased efficiency, better power delivery, and longer battery life by allowing for traces with different thicknesses without the drawbacks of conventional methods, particularly benefiting high-performance computing and multiple chip IC packages.

Implementation Method 1

an electroless catalyst-doped photo-imageable dielectric (PID) on a substrate; laser drilling the electroless catalyst-doped PID to form a first opening having a first thickness and a second opening having a second thickness

Methodology Applied

Scientific EffectElectroless plating:

Implementation Method 2

laser drilling the electroless catalyst-doped PID to form a first opening having a first thickness and a second opening having a second thickness

Methodology Applied

Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS11737208B2Microelectronic assemblies having conductive structures with different thicknesses

Publication Date: 2023.08.22 INTEL CORP

AI summary

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a substrate layer having a surface, wherein the substrate layer includes a photo-imageable dielectric (PID) and an electroless catalyst; a first conductive trace having a first thickness on the surface of the substrate layer; and a second conductive trace having a second thickness on the surface of the substrate layer, wherein the first thickness is greater than the second thickness.