Variable Volume Solder Bumps for Flip Chip Stress Management

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Solution Overview

Problem

Conventional flip chip attachment techniques face mechanical stress issues due to differing thermal expansion coefficients between the die and substrate, leading to solder joint failure, and increasing solder ball size compromises I/O density and uniform stress distribution.

Innovation Solution

The method involves forming column bumps with varying volumes on the die-pads, allowing for differential cross-sectional areas and volumes of solder balls after reflow, which are directly attached to the substrate without a prior reflow step, maintaining uniform height and reducing mechanical stress through strategic placement of larger bumps at high-stress areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If solder ball size is increased to withstand mechanical stress, then mechanical strength is improved, but I/O density decreases

Engineering Contradiction:
Improvemechanical strengthVSAvoidI/O density
Core Design Contradiction:
StrengthVSQuantity of substance

Solution Approach 1:

The patent applies local quality by varying the volume of solder bumps based on their location on the die. Corner bumps, which experience higher mechanical stress during thermal expansion, are made larger (e.g., 25-50% larger) than center bumps. This localized differentiation allows each solder bump to have the appropriate size for its specific stress conditions, providing adequate mechanical strength where needed while maintaining smaller sizes in low-stress areas to preserve I/O density.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If uniform solder ball size is used, then manufacturing simplicity is improved, but mechanical stress distribution worsens

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidmechanical stress distribution
Core Design Contradiction:
Ease of manufactureVSStress or pressure

Solution Approach 1:

The patent implements local quality by creating non-uniform solder bump volumes that correspond to the local stress distribution pattern. The method forms larger bumps at corner locations and smaller bumps at center locations, matching the varying mechanical stress requirements across the die surface. This resolves the contradiction by prioritizing stress distribution optimization over manufacturing simplicity, as the varied bump sizes better accommodate the thermal expansion differential between die and substrate.

Inventive Principle:
Principle #3Local quality

3Reliability

If reflow process is used to form solder balls, then electrical connection is improved, but assembly complexity increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidassembly complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-forming the solder bumps with the correct volume variations before the flip chip attachment process. The solder bumps are created with controlled different volumes using techniques such as selective electroplating or dispensing, so that when the die is flipped and attached to the substrate, the bumps are already sized appropriately for their locations. This eliminates the need for a subsequent reflow step to create uniform solder balls, thereby reducing assembly complexity while maintaining reliable electrical connections.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances mechanical and thermal stability, maintains high I/O density, and reduces the number of assembly steps by eliminating the reflow process, while ensuring robust electrical and mechanical connections.

Implementation Method 1

reflowing the subassembly so that the column bumps form robust electrical and mechanical connections between the die pads and the substrate pads

Methodology Applied
Scientific EffectReflow: Soldering

Data Source

PatentUS8637391B2Flip chip semiconductor assembly with variable volume solder bumps
Publication Date: 2014.01.28 ATI TECHNOLOGIES ULC
  • US8637391B2 patent drawing
  • US8637391B2 patent drawing
  • US8637391B2 patent drawing

AI summary

A method of manufacturing a semiconductor chip is disclosed. A die having a plurality of die-pads is attached to a substrate in a semiconductor package which includes a plurality of substrate-pads. The method involves forming conductive column bumps of differing volumes extending from the die-pads; attaching each of the column bumps to a corresponding substrate-pad to form a subassembly; and reflowing the subassembly so that the column bumps form robust electrical and mechanical connections between the die pads and the substrate pads.