Variable-Width Backside Contacts With Sidewall Spacers
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Solution Overview
Problem
Existing semiconductor technologies face challenges in minimizing the size of field-effect transistors (FETs) while maintaining effective control over the channel and preserving placeholders during backside substrate etching processes.
Innovation Solution
The use of sidewall spacers surrounding contacts and placeholders in semiconductor structures allows for the preservation of placeholders during backside substrate etching and enables more precise control over the formation of contacts with varying widths above and below the spacers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If backside substrate etching is performed to remove placeholders, then contact formation is enabled, but placeholders are lost which compromises alignment and positioning precision
Solution Approach 1:
Sidewall spacers are formed on the placeholders before the backside substrate etching process. These spacers serve as protective structures that prevent the etching process from removing the placeholders, thereby maintaining alignment references while still allowing contact formation to proceed
Solution Approach 2:
The sidewall spacers act as intermediary protective structures between the etching process and the placeholders. They absorb the etching action and prevent direct contact between the etchant and the placeholder material, preserving the placeholders while enabling the etching process to create contact openings
2Area of moving object
If FET size is reduced through miniaturization, then chip area is reduced and performance increases, but control over the channel becomes more difficult
Solution Approach 1:
The patent transitions from planar FET structures to three-dimensional FinFET structures with vertical channels. This dimensional change increases the effective channel width without increasing the planar footprint, allowing better gate control over the channel while maintaining miniaturization benefits
Solution Approach 2:
The channel is segmented into multiple fins or nanosheets, creating multiple narrow channels that are easier to control individually. This segmentation allows the gate to exert more effective control over each narrow channel while achieving high total current capacity
3Ease of manufacture
If contact width is uniform throughout, then manufacturing is simpler, but precision in controlling contact dimensions at different levels is reduced
Solution Approach 1:
The contact structure is designed with varying widths at different vertical levels, creating local quality variations. The contact is narrower at the top and wider at the bottom, allowing precise control over the contact dimensions at each level to optimize both electrical performance and alignment with underlying structures
Data Source
AI summary
A semiconductor structure includes a transistor at a first side of the semiconductor structure, a contact to the transistor at a second side of the semiconductor structure, and sidewall spacers surrounding a portion of sidewalls of the contact. The contact has a first width above the sidewall spacers and a second width below the sidewall spacers, the second width being different than the first width. The second width may be greater than the first width.


