Variable-width circuit area for narrow display frame
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Solution Overview
Problem
Existing display technologies face challenges in achieving a narrow frame due to the large size of demultiplexer circuit and fan-out wiring areas, which occupy significant space and hinder the miniaturization of display devices.
Innovation Solution
The design includes a display panel with a non-display area that features a circuit area adjacent to the display area and a fan-out wiring area with gradually decreasing fan-out wiring lengths, allowing for a concave shape of the circuit area and reduced area occupation, thereby enabling a narrower frame.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the demultiplexer circuit area is designed to be larger to meet pixel charging demand, then the pixel charging demand is satisfied, but the frame area increases and narrow frame cannot be realized
Solution Approach 1:
The patent applies local quality by making the circuit area width variable rather than uniform. Specifically, the width of the circuit area in the first direction gradually decreases from the first end to the second end, allowing different regions to have different capacities matched to their specific needs. This enables the circuit area to meet pixel charging demands in regions requiring larger capacity while minimizing the overall area occupied, thus resolving the contradiction between reliability and frame area.
2Reliability
If the fan-out wiring area is designed with longer wirings to meet impedance requirements, then the impedance requirement is satisfied, but the area occupied increases and narrow frame cannot be realized
Solution Approach 1:
The patent applies dimensionality change by transitioning from a conventional layout where fan-out wirings extend primarily in one direction to a configuration where wirings extend in multiple directions with varying lengths. The fan-out wirings are arranged to have different lengths in the second direction, allowing the design to optimize both impedance characteristics and area utilization simultaneously, thus resolving the contradiction between meeting impedance requirements and minimizing occupied area.
3Productivity
If the circuit area is designed with larger size to accommodate more demultiplexers, then the signal transmission capability is improved, but the frame area increases
Solution Approach 1:
The patent applies local quality by implementing a non-uniform width design for the circuit area. The width gradually decreases from the first end to the second end in the first direction, allowing the circuit area to have larger capacity where more signal transmission capability is needed while reducing capacity in regions where less capability is required. This localized optimization maintains overall signal transmission capability while minimizing the total frame area.
Data Source
AI summary
The present disclosure provides a display panel and a display device, including a display area and a non-display area. The non-display area includes a circuit area and a fan-out wiring area arranged side by side with the display area along a first direction in sequence. The fan-out wiring area includes a plurality of first fan-out wirings with lengths gradually decreasing along a second direction perpendicular to the first direction. The circuit area includes a plurality of first sub-circuit areas in a one-to-one correspondence with the plurality of first fan-out wirings. Widths of the plurality of the first sub-circuit areas in the first direction gradually decrease along the second direction.