Variable Width Interconnection Lines for Display Resistance Equalization

The patent applies local quality by making the interconnection line width variable along its length. Specifically, the line width is made larger in the region where the line connects to the external connection terminal and gradually decreases toward the signal line connection point. This local variation in geometric parameters compensates for the varying path lengths, ensuring that all interconnection lines in different terminal blocks have equal resistance values, thereby maintaining uniform image quality across the display.

The patent changes the geometric parameters of the interconnection lines, specifically the line width, to compensate for length differences. By adjusting the line width parameter inversely proportional to the square root of the line length, the resistance values are equalized. This parameter modification allows the system to maintain reliable signal transmission even when the frame area is reduced and interconnection line lengths vary significantly.

Instead of uniformly increasing the interconnection line width across the entire frame area, the patent applies local quality by concentrating the width increase only in specific regions where needed. The line width is made larger near the external connection terminal and gradually decreases toward the signal line, allowing resistance reduction without proportionally increasing the total frame area.

The patent modifies the line width parameter as a function of position along the interconnection line, creating a tapered profile. This parameter change allows the system to achieve the necessary resistance reduction while minimizing the overall area occupied by interconnection lines, thus preserving high pixel density in the display area.

The patent applies local quality by varying the interconnection line width along its length rather than changing the overall line length. The line width is made larger in regions where the path is longer and smaller where the path is shorter, achieving resistance equalization without extending the physical boundaries of the frame area.

The patent changes the geometric parameters of the interconnection lines, specifically the line width, to compensate for length differences. By adjusting the line width parameter inversely proportional to the square root of the line length, the resistance values are equalized without requiring all lines to have equal lengths, thus avoiding an increase in frame area.