Variable Width Nano-Sheet FinFET Cell Layout Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing integrated circuit (IC) designs face challenges in optimizing the driving ability, speed, power, and area of IC devices due to the constraint of constant width rows of nano-sheet FinFETs in cells.

Innovation Solution

The proposed solution involves generating an IC layout diagram that includes nano-sheet FinFETs with nano-sheet structures of different widths, where a wider nano-sheet structure is abutted to a narrower one within the same cell, optimizing the cell height and enabling finer granularity in IC device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If constant width rows of nano-sheet structures are used in FinFETs, then manufacturing simplicity is maintained, but driving ability, speed, power, and area optimization are limited

Engineering Contradiction:
ImproveIC device performance optimizationVSAvoidnano-sheet structure configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the width of individual nano-sheet structures within different active regions of the same cell. Specifically, first nano-sheet structures have a first width in first active regions, while second nano-sheet structures have a second width in second active regions, allowing each region to be optimized for its specific function (e.g., drive strength, speed, power) rather than using a uniform width throughout the cell

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The cell is segmented into multiple active regions (first active regions and second active regions) with differently sized nano-sheet structures. This segmentation allows independent optimization of transistor performance characteristics within each region, enabling fine-grained control over driving ability, speed, power, and area without requiring complete redesign of the entire cell structure

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If wider nano-sheet structures are abutted to narrower ones within the same cell, then finer granularity in IC device performance is achieved, but structural complexity increases

Engineering Contradiction:
Improvecell height optimizationVSAvoidnano-sheet structure arrangement
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs asymmetry by abutting nano-sheet structures of different widths (first width and second width) adjacent to each other within the same cell. The first nano-sheet structures have a first width while the second nano-sheet structures have a second width, creating an asymmetric configuration that enables precise optimization of cell height and transistor performance for different functional requirements within the same cell boundary

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12307183B2Variable width nano-sheet field-effect transistor cell structure
Publication Date: 2025.05.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12307183B2 patent drawing
  • US12307183B2 patent drawing
  • US12307183B2 patent drawing

AI summary

One aspect of this description relates to a method for operating an integrated circuit (IC) manufacturing system. The method includes placing a first nano-sheet structure within a IC layout diagram. The first nano-sheet structure has a first width. The method includes abutting a second nano-sheet structure with the first nano-sheet structure. The second nano-sheet structure has a second width. The second width is less than the first width. The method includes generating and storing the IC layout diagram in a storage device.