Variable-Width Data Input for Pattern Recognition Throughput
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Solution Overview
Problem
Existing pattern-recognition systems in computing face bottlenecks when processing large volumes of data due to their fixed-width capabilities, leading to slowed data receipt and bus congestion, as they are only capable of processing one byte at a time, even when operating on wider buses.
Innovation Solution
A variable-width data input system is implemented, allowing the pattern-recognition processor to receive and process data streams of varying widths by using address signals to indicate valid bytes, enabling efficient processing of multiple bytes in parallel and reducing the need for sequential byte processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed-width device processes data one byte at a time, then the device can process data sequentially, but the processing speed decreases and bus capacity is not fully utilized
Solution Approach 1:
The patent implements a variable-width data input mechanism that dynamically adjusts the number of bytes transferred in a single bus cycle based on the data stream characteristics. The system can transfer 1, 2, or 4 bytes per cycle depending on the search criteria and data requirements, making the data input mechanism adaptive rather than fixed. This resolves the contradiction by enabling faster processing when data allows (4 bytes/cycle) while maintaining compatibility with variable-width data streams.
Solution Approach 2:
The patent changes the parameter of data width from a fixed value to a variable value that can take multiple discrete values (1 byte, 2 bytes, or 4 bytes per cycle). This is achieved through control logic that selects the appropriate data width based on the search criteria and available data, allowing the system to optimize bus utilization while maintaining processing accuracy for different data formats.
2Adaptability or versatility
If the number of patterns to be searched increases, then pattern recognition capability improves, but the delay before searching the next data portion increases
Solution Approach 1:
The patent implements preliminary action by pre-establishing multiple search criteria and patterns in the device memory before processing begins. The system can have multiple patterns ready for immediate processing without requiring sequential loading or preparation during the search operation. This allows the device to quickly switch between different search criteria and patterns, reducing the delay before searching the next data portion even when multiple patterns are involved.
3Reliability
If a byte-oriented device is used, then the device can process data sequentially, but the bus capacity is not fully utilized causing congestion
Solution Approach 1:
The patent makes the data input width dynamic, allowing the system to transfer 1, 2, or 4 bytes per bus cycle depending on the search criteria and data stream characteristics. When multiple bytes are available and the search criteria permit, the system transfers 4 bytes in a single cycle, fully utilizing the bus capacity. When variable-width data streams require stricter processing, the system adjusts to 1 or 2 bytes per cycle, maintaining processing accuracy while still optimizing bus utilization.
Data Source
AI summary
Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving bytes over a data bus having a first width and receiving one or more signals indicating the validity of each of the one or more bytes. The valid bytes may be sequentially provided to a pattern-recognition processor in an 8-bit wide data stream. In an embodiment, a system may include one or more address lines configured to provide the one or more signals indicating the validity of the bytes transferred over the data bus. The system may include a buffer and control logic to sequentially process the valid bytes.