Variable-Width Pillar Interconnects for Reliable Solder Joints
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Solution Overview
Problem
There is a need for robust and reliable joints between components in integrated devices to enhance performance and reduce the risk of delamination and electrical shorts.
Innovation Solution
The use of pillar interconnects with varying widths, where the width at the top is less than the width at the base, provides a larger surface area for solder interconnects, reducing stress on dielectric layers and increasing the reliability of the joint between the integrated device and the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pillar interconnects with uniform width are used, then manufacturing is simpler, but joint reliability and stress distribution are insufficient
Solution Approach 1:
The pillar interconnect is designed with non-uniform width where different sections have different widths. The first section has a first width and the second section has a second width that is less than the first width. This local variation in geometry optimizes stress distribution and joint reliability at critical interfaces while maintaining structural integrity throughout the interconnect.
Solution Approach 2:
The width parameter of the pillar interconnect is changed along its length to optimize performance. By varying the width from the first section to the second section, the interconnect achieves improved stress distribution and joint reliability without requiring completely new structural concepts.
2Reliability
If larger surface area is provided for solder interconnects, then joint reliability improves, but manufacturing precision requirements increase
Solution Approach 1:
The pillar interconnect provides increased surface area at the first section where it interfaces with solder interconnects, while the second section has a reduced width. This localized expansion of surface area enhances joint reliability at the critical solder interface without requiring the entire interconnect structure to be larger or more complex.
Data Source
AI summary
An integrated device comprising a die portion that includes a plurality of pads and a plurality of under bump metallization interconnects coupled to the plurality of pads, where the plurality of under bump metallization interconnects comprises a first under bump metallization interconnect. The integrated device includes a plurality of pillar interconnects coupled to the plurality of under bump metallization interconnects, where the plurality of pillar interconnects includes a first pillar interconnect. The first pillar interconnect includes a first width that corresponds to a widest part of the first pillar interconnect, and a second width that corresponds to a part of the first pillar interconnect that is vertically farthest away from the first under bump metallization interconnect, wherein the second width is less than the first width.