Variable-Width PMOS Drivers for Leakage Reduction in Standby Mode
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Solution Overview
Problem
The increasing ratio of leakage current to standby current in semiconductor memory devices, particularly in PSRAM, becomes significant as transistors shrink, posing a challenge for low-power and high-density memory requirements in mobile devices.
Innovation Solution
The internal power supply voltage generating circuit is designed to drive only necessary internal power drivers in standby mode, using high voltage as a back bias for non-operational drivers to prevent leakage current, with first drivers generating voltage in all modes except deep power-down and standby, and second drivers receiving this bias to preclude leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the width of PMOS transistors in internal power drivers is reduced to lower leakage current, then leakage current is reduced, but the current driving capability in operational modes is insufficient
Solution Approach 1:
The patent applies dynamics by making the transistor width adjustable rather than fixed. The internal power drivers use variable-width PMOS transistors that can dynamically change their effective width based on the operating mode. In standby mode, the transistor width is reduced to minimize leakage current, while in operational modes, the width is increased to provide sufficient current driving capability. This dynamic adjustment resolves the contradiction between low leakage and high driving capability.
Solution Approach 2:
The patent changes the physical parameter of transistor width to resolve the contradiction. By controlling the effective width of PMOS transistors through variable resistance elements or switchable configurations, the system can optimize the width parameter for different operating conditions - narrow width for standby (low leakage) and wide width for operation (high driving capability).
2Reliability
If all internal power drivers are driven in standby mode to maintain voltage, then voltage stability is maintained, but leakage current increases significantly
Solution Approach 1:
The patent segments the internal power drivers into different groups with different operational characteristics. Some power drivers are designated to operate in standby mode to maintain critical voltages, while others are placed in low-power mode. This segmentation allows the system to maintain necessary voltage stability for core functions while minimizing leakage current by keeping non-critical drivers inactive during standby.
Solution Approach 2:
Different internal power drivers are assigned different operational states based on their specific functions and criticality. Critical power drivers maintain full operation in standby mode to ensure voltage stability for essential circuits, while non-critical drivers are reduced to low-power mode. This local differentiation of operational quality resolves the contradiction between overall voltage stability and leakage reduction.
3Quantity of substance
If transistor size is reduced to increase memory density, then memory density is improved, but leakage current ratio increases
Solution Approach 1:
The patent applies dynamics to the power management system to compensate for the increased leakage ratio caused by small transistor sizes. By dynamically adjusting the operational state of internal power drivers based on mode detection, the system can optimize power consumption for the scaled transistor architecture. The variable-width transistors and mode-selective driver operation help manage the higher leakage characteristics inherent in high-density, small-transistor designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces leakage current and overall power consumption, extending the use time of low-power mobile devices by minimizing unnecessary transistor operation and channel leakage.
Implementation Method 1
The deep power-down detection signal (PWb) becomes a logical high in deep power-down mode to turn off the PMOS transistors of the internal power drivers 10-1 to 10-n, and becomes a logical low in modes other than the deep power-down mode to turn on the PMOS transistors of the internal power drivers 10-1 to 10-n.
Implementation Method 2
Another object of the present invention is to reduce the leakage current of an internal power driver that does not operate in standby mode by using a high voltage as a back bias of the internal power driver.
Data Source
AI summary
An internal power supply voltage generating circuit of semiconductor memory devices configured such that only a predetermined internal power driver is driven but the remaining internal power drivers are not driven, in a standby mode so that the leakage current in standby mode is reduced and the standby current is thus reduced. Furthermore, the leakage current of an internal power driver that does not operate in the standby mode is reduced using a high voltage as a back bias of the internal power driver.