Variable Width Spacer Fabrication for SRAM Static Noise Margin
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Solution Overview
Problem
Conventional sidewall image transfer (SIT) techniques for forming fin structures in semiconductor devices are limited by the inability to create spacers with varying widths, which restricts the applicability and limits the increase in static noise margin (SNM) in static random access memory (SRAM) due to all spacers having the same width.
Innovation Solution
A method involving the formation of sacrificial patterns on a substrate with different regions, where spacers are formed and trimmed to achieve varying widths, allowing for pattern transfer with sub-lithographic features and enabling the creation of patterned structures with different line widths, thereby enhancing the applicability of the SIT technique.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional SIT technique is used to form spacers, then the fabrication process is simple, but all spacers can only have the same width which restricts the applicability
Solution Approach 1:
The substrate is divided into multiple regions (first region, second region, third region) with different spacer width requirements. Each region undergoes selective processing steps, allowing spacers of different widths to be formed in different areas. This segmentation enables the fabrication of diverse fin structures with varying widths while maintaining a systematic fabrication approach.
Solution Approach 2:
Different regions of the substrate are given different local properties through selective masking and trimming. The mask layer is selectively removed in certain regions to expose spacers for trimming, while other regions retain their original spacer width. This local differentiation allows each region to have the specific spacer width needed for its functional requirements.
2Reliability
If all spacers have the same width in conventional SIT, then the fabrication process is straightforward, but the static noise margin (SNM) of SRAM cannot be increased
Solution Approach 1:
The invention applies local quality by creating different spacer widths in different regions to optimize SRAM performance. Specifically, spacers in certain regions are trimmed to narrower widths while others maintain original widths, allowing differential control over carrier channel dimensions. This enables enhancement of static noise margin through optimized layout ratios while maintaining fabrication feasibility.
Solution Approach 2:
The mask layer is formed covering all spacers before any trimming occurs. This preliminary masking step establishes a baseline state from which selective removal and trimming can proceed. By preparing the mask layer in advance and then selectively removing it in specific regions, the process enables controlled differentiation of spacer widths while following a systematic sequence of operations.
3Adaptability or versatility
If spacer width is varied to improve SRAM performance, then the applicability of SIT technique increases, but the fabrication process becomes more complex
Solution Approach 1:
The fabrication process is segmented into distinct phases: initial spacer formation, mask layer deposition, selective mask removal in specific regions, and selective trimming. This segmentation allows the complex task of creating variable width spacers to be broken down into manageable steps, each with a specific function, making the overall complex process more controllable and systematic.
Solution Approach 2:
The mask layer serves as an intermediary element that enables selective trimming. By introducing this intermediate layer that can be selectively removed, the process achieves variable spacer widths without requiring completely different fabrication approaches for each region. The mask layer mediates between the uniform initial spacer formation and the final differentiated spacer width configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of semiconductor devices with patterned structures having sub-lithographic features and varying widths, improving the SNM in SRAM by enabling the creation of spacers with different dimensions, thus overcoming the limitations of conventional SIT techniques.
Implementation Method 1
a plurality of a sacrificial patterns are formed in the first region and the second region respectively
Implementation Method 2
a first spacer is formed on the sidewalls of each sacrificial pattern
Implementation Method 3
the first spacer within the second region is trimmed to be a second spacer
Data Source
AI summary
A method for fabricating a patterned structure in a semiconductor device is provided. First, a substrate with a first region and a second region is provided. Then, a plurality of sacrificial patterns is respectively formed within the first region and the second region. A first spacer is then formed on the sidewalls of each of the sacrificial patterns followed by forming a mask layer to cover the sacrificial patterns located within the first region. Finally, the first spacer exposed from the mask layer is trimmed to be a second spacer and the mask layer is then removed.