Variable Width Transistor Channel for Matching Precision
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Solution Overview
Problem
Transistor mismatches due to variance in threshold voltage, width, and length across transistors in semiconductor devices lead to operational variances in circuits like current mirrors and differential pairs, which become more significant as transistor sizes decrease, posing a challenge in maintaining circuit performance.
Innovation Solution
The solution involves creating transistors with channels that vary in cross-sectional width from the source to the drain, either through physical shaping with smooth or stepped edges, or by combining component transistors of different sizes to form effective channels with a narrower width near the source and a wider width near the drain, reducing the impact of variance without increasing overall transistor area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor sizes are decreased to increase device density, then productivity is improved, but manufacturing precision deteriorates due to increased variance in threshold voltage, width, and length
Solution Approach 1:
The patent applies local quality by creating non-uniform channel widths within transistors, where different regions of the channel have different widths. Specifically, the channel width is varied along the length of the channel to compensate for manufacturing variances, with wider regions compensating for areas affected by threshold voltage variations, width variations, or length variations. This local modification of channel geometry allows smaller transistors to achieve better matching characteristics without requiring increased overall transistor area.
2Productivity
If transistor sizes are decreased to increase device density, then productivity is improved, but reliability deteriorates due to increased operational variances in current mirrors and differential pairs
Solution Approach 1:
The patent applies parameter changes by modifying the geometric parameters of the transistor channel, specifically the channel width, to compensate for manufacturing variances. By varying the channel width along the channel length, the invention changes the electrical characteristics of the transistor to achieve better matching in current mirrors and differential pairs, thereby improving circuit reliability despite smaller transistor sizes.
3Manufacturing precision
If larger transistors are used to reduce parameter variance, then manufacturing precision is improved, but area of the transistor increases
Solution Approach 1:
The patent applies local quality by creating non-uniform channel widths within transistors, where different regions of the channel have different widths. Specifically, the channel width is varied along the length of the channel to compensate for manufacturing variances, with wider regions compensating for areas affected by threshold voltage variations, width variations, or length variations. This local modification of channel geometry allows smaller transistors to achieve better matching characteristics without requiring increased overall transistor area.
Data Source
AI summary
The present inventions are related to systems and methods for pre-equalizer noise suppression in a data processing system. As an example, a data processing system is discussed that includes: a sample averaging circuit, a selector circuit, an equalizer circuit, and a mark detector circuit. The sample averaging circuit is operable to average corresponding data samples from at least a first read of a codeword and a second read of the codeword to yield an averaged output based at least in part on a framing signal. The selector circuit is operable to select one of the averaged output and the first read of the codeword as a selected output. The equalizer circuit is operable to equalize the selected output to yield an equalized output, and the mark detector circuit is operable to identify a location mark in the equalized output to yield the framing signal.