Variation-Aware Circuit Simulation Using Behavioral Models

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Solution Overview

Problem

Advanced integrated circuit designs face performance variations due to fluctuations in processing and environmental conditions, particularly at technology nodes smaller than 40 nanometers, which existing Electronic Design Automation (EDA) tools fail to accurately simulate and account for.

Innovation Solution

A bottom-up simulation flow using behavioral models that incorporate global and local variations into sub-circuit parameters, allowing for the consideration of process corners and probability distributions of device variables to simulate system-level circuit performance effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional EDA tools perform pre-simulation without variation awareness, then simulation speed is maintained, but simulation accuracy deteriorates due to inability to account for process variations at advanced technology nodes

Engineering Contradiction:
Improvesimulation accuracyVSAvoidsimulation speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the simulation process into multiple simulation runs, each targeting specific design corners (e.g., slow-slow, fast-fast, typical-typical). This segmentation allows the simulation to focus computational resources on critical variation scenarios rather than attempting to simulate all possible variations simultaneously, thereby improving accuracy for each corner while maintaining overall simulation efficiency through targeted analysis.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If EDA tools simulate all possible process variations, then simulation accuracy improves, but computational complexity and simulation time increase exponentially

Engineering Contradiction:
Improvesimulation accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies partial action by simulating only the most critical design corners rather than all possible process variations. By identifying and focusing on key corners (such as slow-slow, fast-fast, and typical-typical), the simulation achieves sufficient accuracy for design verification without the exponential computational burden of exhaustive simulation, thus reducing computational complexity while maintaining practical accuracy.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If multiple simulation runs are performed for different design corners, then reliability of performance verification improves, but total simulation time increases

Engineering Contradiction:
Improveperformance verification reliabilityVSAvoidtotal simulation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary identification and prioritization of critical design corners before executing simulations. By pre-determining which corners (e.g., slow-slow, fast-fast, typical-typical) are most relevant to the specific circuit design and its performance requirements, the system can focus simulation efforts on these high-impact scenarios, thereby achieving reliable verification with reduced total simulation time compared to exhaustive corner analysis.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10169507B2Variation-aware circuit simulation
Publication Date: 2019.01.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10169507B2 patent drawing
  • US10169507B2 patent drawing
  • US10169507B2 patent drawing

AI summary

An integration circuit (IC) simulation method includes: (a) providing a design netlist of a system-level circuit, wherein the system-level circuit comprises a first sub-circuit; (b) providing a first behavior model that is determined based on an operation of the first sub-circuit, wherein the first behavior model is a function of one or more respective behavior-level parameters; (c) incorporating a first variation into each of the one or more behavior-level parameters of the first behavioral model; and (d) simulating the system-level circuit based on the one or more behavior-level parameters of the first behavior model that incorporates the first variation.