Surface Mount Varistor Void Design for Substrate Burn Prevention

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Solution Overview

Problem

Conventional surface mount chip varistors designed for high voltages and current pulses generate excessive heat when short-circuiting, posing a high risk of burning the substrate due to their proximity to the circuit board.

Innovation Solution

A surface mount chip varistor with a duplex resin structure and protruding frame terminals that create a void between the varistor and the substrate, preventing direct contact and heat transfer during short-circuit events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the varistor is enlarged to endure high voltages and current pulses, then the surge protection capability is improved, but the heat generation during short-circuit increases causing substrate burning risk

Engineering Contradiction:
Improvesurge protection capabilityVSAvoidsubstrate burning risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an insulating covering material as an intermediary between the varistor element and the substrate. This covering material includes a first resin layer directly covering the varistor element, and a second resin layer covering the first resin layer, creating thermal isolation during short-circuit events while maintaining electrical connection functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a void space in the vertical dimension between the varistor element and the substrate by designing the insulating covering material with specific thickness parameters. The void height is set to be equal to or greater than 3/4 the thickness of the varistor element, providing thermal clearance in the height direction while maintaining compact horizontal footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If the varistor base is placed in proximity to the substrate for compact mounting, then the space utilization is improved, but the heat transfer to substrate during short-circuit increases

Engineering Contradiction:
Improvemounting spaceVSAvoidheat transfer to substrate
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The insulating covering material serves as a thermal intermediary layer between the varistor element and the substrate. The first resin layer provides direct coverage with thickness of 1/4 to 3/4 the varistor element thickness, while the second resin layer adds additional thermal isolation, collectively blocking heat transfer paths to the substrate

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent pre-establishes thermal protection by forming the insulating covering material and void space before mounting. The covering material is designed with sufficient thickness and the void is created beforehand to ensure thermal clearance is already in place before any short-circuit event occurs, preventing heat transfer in advance

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively prevents substrate burning during high voltage and current pulse events by maintaining a safe distance and reducing heat transfer, ensuring reliable operation.

Implementation Method 1

a first resin layer for covering the varistor element, the electrodes, and the frame terminals, and a second resin layer for covering the first resin layer

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS8912876B2Surface mounting varistor
Publication Date: 2014.12.16 KOA CORP
  • US8912876B2 patent drawing
  • US8912876B2 patent drawing
  • US8912876B2 patent drawing

AI summary

A surface mounting varistor for high voltages and current pulses without any risk of burning a mounting board is provided. A covering material for a varistor 1 has a duplex (two layer) structure made from a first mold layer 13 and a second mold layer 15, and a leg with a predetermined height is formed on the bottom of the covering material. As a result, a space (void) formed between a varistor element 2 and a mounting board 20 when the varistor 1 is mounted on the board 20 allows avoidance of the risk of burning the board 20, even if the varistor short-circuits.