Varying Cross-Section Elevated Source/Drain Structures
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Solution Overview
Problem
The formation of facets during selective epitaxial growth in semiconductor devices leads to inconsistent ion implantation and contact resistance variations, resulting in unstable device performance, especially as device structures become finer.
Innovation Solution
A semiconductor device with elevated source/drain structures is manufactured using a selective epitaxial growth method under controlled temperature and pressure conditions, where the oxide film and gate wiring define the shape, ensuring consistent contact area and reduced facet occurrence, employing a silicon oxide film and silicon nitride film combination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selective epitaxial growth is performed to form elevated source/drain structures, then the elevated structures are formed to reduce electric field effects, but facets occur at the STI region causing inconsistent ion implantation and contact resistance variations
Solution Approach 1:
The elevated source/drain structure is divided into two distinct regions: a first region with a smaller cross-sectional area and a second region with a larger cross-sectional area. This segmentation allows each region to serve different functional purposes - the first region provides the elevated structure for electric field management while the second region ensures consistent contact area and position, thereby resolving the contradiction between reliability and manufacturing precision.
Solution Approach 2:
Different regions of the elevated structure are given different cross-sectional areas to fulfill different requirements. The first region has a smaller cross-section optimized for electric field effects, while the second region has a larger cross-section optimized for contact consistency. This local differentiation allows the structure to simultaneously achieve both reliability improvement and manufacturing precision.
2Manufacturing precision
If the elevated structure cross-section varies, then ion implantation distribution becomes inconsistent, but maintaining a uniform cross-section would eliminate this variation
Solution Approach 1:
The elevated structure is segmented into a first region for electric field management and a second region for consistent contact. The second region's larger and more consistent cross-sectional area ensures uniform ion implantation distribution, while the first region maintains the varying cross-section needed for electric field control. This segmentation resolves the contradiction between implantation consistency and contact stability.
Solution Approach 2:
The solution moves from considering only the cross-sectional area to considering both cross-sectional area and vertical position. The second region is positioned at a specific height range (50-150nm from the substrate) with a larger cross-section, creating a three-dimensional structure that simultaneously achieves implantation consistency and contact stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the performance of semiconductor devices by ensuring consistent elevated source/drain structures, reducing facet-related issues and variations in contact resistance, even when facets occur, thereby enhancing the reliability of dynamic random access memory (DRAM) and similar semiconductor devices.
Implementation Method 1
growing a semiconductor crystal to protrude on a semiconductor silicon substrate by a selective epitaxial growth method
Data Source
AI summary
A semiconductor device with an elevated source/drain structure provided in each predetermined position defined by the oxide film and gate wiring on a semiconductor silicon substrate, where an orthographic projection image of a shape of an upper end portion of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is substantially in agreement with a predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate, and at least one of orthographic projection images of cross-sections taken along planes parallel with the semiconductor silicon substrate of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is larger than the predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate.