Varying Thickness Blocking Layer for 3D NAND Reliability
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Solution Overview
Problem
In three-dimensionally integrated semiconductor devices, the electric field intensity at the lower portion of columnar portions can exceed the necessary threshold for storing charge, leading to degradation of memory layers and reduced reliability due to uneven electric field distribution across memory cells.
Innovation Solution
The semiconductor device design includes a columnar portion with a thicker blocking layer at the lower portion compared to the upper portion, which reduces the electric field intensity and prevents degradation by maintaining the thickness of the blocking layer and tunneling layer appropriately across the columnar structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform thickness blocking layer is used throughout the columnar portion, then the manufacturing process is simple, but the electric field intensity becomes uneven causing memory layer degradation
Solution Approach 1:
The blocking layer is designed with different thicknesses at different locations: a first thickness at the upper portion and a greater second thickness at the lower portion. This local variation in thickness creates a more uniform electric field distribution throughout the columnar portion, preventing memory layer degradation while maintaining manufacturing feasibility through selective epitaxial growth.
2Reliability
If the blocking layer thickness is increased at the lower portion, then the electric field distribution becomes more uniform, but the manufacturing precision requirements increase
Solution Approach 1:
A sacrificial layer is deposited beforehand on the substrate before forming the blocking layer. The blocking layer is then grown epitaxially on this sacrificial layer, which serves as a foundation that enables controlled thickness variation. The sacrificial layer is later removed, leaving the blocking layer with the desired non-uniform thickness profile achieved through controlled growth rates at different stages.
3Reliability
If the columnar portion dimension is reduced at the lower portion, then the electric field intensity is reduced, but the charge storage capacity decreases
Solution Approach 1:
The columnar portion is designed with different dimensions at different heights: a larger cross-sectional area at the upper portion and a smaller cross-sectional area at the lower portion. This local variation allows the upper portion to provide sufficient charge storage capacity while the lower portion maintains controlled electric field intensity, achieving both goals simultaneously through spatial differentiation.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a substrate, a stacked body, and a columnar portion. The stacked body, provided on the substrate, includes first conductive layers and first insulating layers provided alternately along a first direction. The columnar portion extends through the stacked body in the first direction. The columnar portion includes a blocking layer, a charge storage layer, a tunneling layer, and a semiconductor layer. The columnar portion includes a first portion and a second portion. The second portion is provided on the substrate side of the first portion. A dimension in the second direction of the second portion is smaller than a dimension in a second direction of the first portion. A portion of the blocking layer is provided at the second portion being thicker than a portion of the blocking layer provided at the first portion.