Varying Width Gate Structure for FinFET Reliability

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Solution Overview

Problem

Increased integration density in semiconductor devices leads to a short channel effect, which is not effectively addressed by existing technologies, particularly in fin field effect transistors (FinFETs), affecting the reliability and performance of these devices.

Innovation Solution

The semiconductor device incorporates a gate structure with varying widths in different areas, where the gate structure is disposed on both active fins and a field insulating layer, with spacers defining the width, ensuring continuous extension along both areas, and the widths are adjusted to maintain reliability by optimizing the distance between spacers and the gate structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate structure has a uniform width across all areas, then the manufacturing process is simpler, but the reliability deteriorates due to improper filling and oxygen introduction in different regions

Engineering Contradiction:
Improvedevice reliabilityVSAvoidgate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure is designed with different widths for different areas: a first width for the first area and a second width for the second area. This local differentiation ensures proper filling and prevents oxygen introduction in each specific region, thereby improving overall device reliability without requiring a completely complex manufacturing process.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The gate structure is segmented into distinct width regions (first area with first width, second area with second width) rather than maintaining a uniform width. This segmentation allows each region to be optimized for its specific functional requirements, resolving the contradiction between reliability and manufacturing simplicity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the gate structure width is increased to ensure proper filling, then the filling reliability improves, but the device area increases and integration density decreases

Engineering Contradiction:
Improvegate electrode filling reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of uniformly increasing the gate structure width across the entire device, the patent applies a wider width only in the first area where proper filling is critical, while maintaining a narrower width in the second area. This localized approach ensures filling reliability where needed without unnecessarily increasing the overall device area.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11183496B2Semiconductor device
Publication Date: 2021.11.23 SAMSUNG ELECTRONICS CO LTD
  • US11183496B2 patent drawing
  • US11183496B2 patent drawing
  • US11183496B2 patent drawing

AI summary

Semiconductor devices are provided. The semiconductor device includes an active fin which extends along a first direction and has a protruding shape, a gate structure which is disposed on the active fin to extend along a second direction intersecting the first direction, and a spacer which is disposed on at least one side of the gate structure, wherein the gate structure includes a first area and a second area which is adjacent to the first area in the second direction, wherein a first width of the first area in the first direction is different from a second width of the second area in the first direction, and the spacer extends continuously along both the first area and the second area.