VCO-ADC Feedback Linearization Using Frequency-Controlled Capacitors
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Solution Overview
Problem
Classical microphone ADCs face challenges in power consumption and dynamic range, particularly in deep submicron CMOS processes, which are not fully compatible with switched-capacitor sigma-delta modulator ADCs, and are sensitive to nonlinear tuning curves and flicker noise.
Innovation Solution
A voltage-controlled oscillator (VCO) with an analog feedback loop using frequency-dependent resistors (FDRs) is implemented, which linearizes the output frequency versus input voltage characteristic and reduces flicker noise by creating a negative feedback loop, allowing for improved linearity and compatibility with deep submicron CMOS processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If switched-capacitor sigma-delta modulator ADCs are used in deep submicron CMOS processes, then manufacturing compatibility is improved, but power consumption increases and dynamic range deteriorates
Solution Approach 1:
The patent replaces the traditional switched-capacitor sigma-delta modulator architecture with a voltage-controlled oscillator (VCO) based architecture. This substitution enables compatibility with deep submicron CMOS processes while achieving lower power consumption and improved dynamic range by exploiting the natural oscillatory behavior of the system rather than relying on complex switching and capacitive integration circuits that consume significant power in scaled processes.
Solution Approach 2:
The patent transforms the ADC operation by changing from a time-domain switched-capacitor integration approach to a frequency-domain VCO-based approach. The output frequency of the VCO is directly proportional to the input voltage, and this frequency parameter is then converted to digital form. This parameter transformation enables the system to achieve high dynamic range and low power consumption in deep submicron CMOS by operating in the frequency domain where noise is naturally filtered.
2Use of energy by moving object
If VCO-based ADC is implemented, then power consumption is reduced and dynamic range is improved, but linearity deteriorates due to nonlinear tuning curves
Solution Approach 1:
The patent introduces a feedback mechanism where the output frequency of the VCO is fed back through a frequency-to-voltage converter that generates a correction signal. This feedback signal is used to linearize the nonlinear tuning curve of the VCO by dynamically adjusting the control voltage to compensate for nonlinearities. The feedback loop continuously corrects the linearity error, enabling the system to achieve both low power consumption and high linearity simultaneously.
3Reliability
If VCO-based ADC is implemented, then jitter tolerance is improved, but sensitivity to nonlinear tuning curves increases
Solution Approach 1:
The feedback loop in the patent serves dual purposes: it linearizes the nonlinear tuning curve while simultaneously filtering out jitter and noise from the VCO output. The frequency-to-voltage converter and subsequent filtering stages in the feedback path act as low-pass filters that attenuate high-frequency jitter components, allowing the system to maintain high linearity while being tolerant to VCO jitter.
Data Source
Figure 1
Figure 2A~2B
Figure 3A
AI summary
An analog-to-digital converter (ADC) includes a first controlled oscillator (CO) for generating at least one phase signal, and wherein the at least one phase signal generates a first output signal of the ADC; and at least one first frequency-controlled resistor (FDR) for receiving the at least one phase signal generated by the first CO, wherein the first CO and the at least one first FDR are coupled together at a first subtraction node of the ADC, and wherein the first subtraction node receives a first input signal.