Multiphase VCO ADC Quantization With Gray Code Phase Synchronization

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Solution Overview

Problem

Sigma Delta ADCs have reached technology limits, and VCO-based ADCs with multiphase Ring Oscillators face errors due to desynchronization between coarse and fine phase estimations and direct sampling of phases, compromising ADC performance in low-cost digital microphones.

Innovation Solution

A coarse-fine quantization architecture for VCO-based ADCs using a ring oscillator with a main Gray code counter for integer phase progression and a fine counter for fractional phase progression, along with difference generators and an adder to generate a digital signal, mitigates synchronization errors through Gray code encoding and phase sampling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a coarse-fine quantization architecture is used in VCO-based ADCs, then area and power consumption are reduced, but synchronization errors between coarse and fine phase estimations compromise ADC performance

Engineering Contradiction:
Improvearea of quantization circuitryVSAvoidADC performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The quantization process is divided into coarse quantization (integer phase progression) and fine quantization (fractional phase progression) stages. The coarse counter handles integer phase steps while the fine counter handles fractional phase steps, allowing area reduction through selective quantization while maintaining overall accuracy through hierarchical processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A synchronization mechanism acts as an intermediary between the coarse and fine counters to coordinate their operations. This mediator ensures that the coarse and fine phase estimations are properly aligned and synchronized, preventing synchronization errors that would otherwise compromise ADC performance

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If direct sampling of phases is performed, then conversion speed is improved, but synchronization errors and measurement inaccuracies compromise ADC performance

Engineering Contradiction:
Improveconversion speedVSAvoidphase estimation accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The system performs preliminary synchronization of the coarse and fine counters before phase sampling occurs. By pre-aligning the counting operations and establishing proper phase relationships in advance, the system enables direct sampling without introducing synchronization errors or measurement inaccuracies

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10270460B1Coarse-fine quantization architecture for multiphase VCO-based ADCs
Publication Date: 2019.04.23 INFINEON TECHNOLOGIES AG
  • US10270460B1 patent drawing
  • US10270460B1 patent drawing
  • US10270460B1 patent drawing

AI summary

An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse Gray code counter having a first input coupled to a first output of the ring oscillator and a second input for receiving a clock signal, a fine counter having first inputs coupled to secondary outputs of the ring oscillator and a second input for receiving the clock signal, a first difference generator having an input coupled to the output of the coarse counter, a second difference generator having an input coupled to the output of the fine counter, and an adder having a first input coupled to the output of the first difference generator, a second input coupled to the output of the second difference generator, and an output for providing a digital signal corresponding to the analog signal.