VCO-ADC Power Mode Switching Without Audio Artefacts
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Solution Overview
Problem
Digital microphones based on switched-capacitor sigma-delta ADCs face challenges in changing power modes without introducing sound artefacts, as they require changing the system clock frequency, leading to increased power consumption and noise due to the need for digital interpolators.
Innovation Solution
A voltage-controlled oscillator (VCO)-based ADC system that uses a variable resistor in series with a source follower to change the rest frequency of the VCO, allowing for quick and artifact-free mode transitions by varying the resistance, thus controlling power and quantization noise without altering the clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the system clock frequency is changed to select different power modes, then power consumption can be regulated, but sound artefacts occur and digital interpolators are required which increase power consumption and silicon area
Solution Approach 1:
The patent changes the rest frequency of the VCO by modifying the resistance value in the VCO circuit, rather than changing the system clock frequency. This parameter change allows power mode selection without requiring digital interpolators, thereby avoiding sound artefacts while still achieving power regulation.
Solution Approach 2:
The patent introduces a variable resistor as an intermediary component in the VCO circuit to control the rest frequency. This intermediary allows smooth transition between power modes without directly changing the system clock frequency, thus avoiding the need for complex digital interpolator circuits.
2Stability of the object's composition
If digital interpolators are used to maintain constant data rate during clock frequency changes, then data rate stability is improved, but overall power consumption and silicon area increase
Solution Approach 1:
The patent removes the digital interpolator component from the system entirely. By changing the VCO rest frequency instead of the system clock frequency, the patent achieves power mode selection without requiring digital interpolators, thereby eliminating their power consumption and silicon area overhead while maintaining data rate stability.
3Use of energy by stationary object
If the VCO rest frequency is changed by modifying the VCO circuit, then power and quantization noise can be controlled, but circuit complexity increases
Solution Approach 1:
The patent achieves power regulation by simply changing the resistance value in the existing VCO circuit. This parameter change approach allows control of the VCO rest frequency and consequently power consumption and quantization noise, without adding complex control logic or modifying the fundamental VCO architecture.
Data Source
AI summary
A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) includes a first source follower coupled between a first input terminal and a first internal node; a first VCO having an input coupled to a second internal node; a first variable resistor coupled between the first internal node and the second internal node; and a digital signal processing component coupled between an output of the first VCO and a output terminal.