VCO Bias Current Calibration for Low Phase Noise

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Solution Overview

Problem

Existing voltage-controlled oscillators (VCOs) face challenges in minimizing phase noise due to variations in operating frequency, voltage, and temperature, and prior calibration methods using peak-detection circuits and control loops are costly and reduce the tuning range.

Innovation Solution

A calibration circuit that alters and monitors the bias current of a VCO to identify an optimum bias current corresponding to an extreme value of the average voltage at a common-mode node, minimizing 1/f3 phase noise by correlating bias current with common-mode voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If peak-detection circuits and control loops are used to identify optimum bias current, then phase noise can be minimized, but device complexity and cost increase significantly

Engineering Contradiction:
Improvephase noise performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential calibration function from complex peak-detection circuits and control loops, implementing only the necessary bias current adjustment mechanism. The calibration circuit directly modifies the bias current based on predetermined values without requiring full peak-detection infrastructure, thereby reducing device complexity while maintaining phase noise optimization capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs a simplified calibration approach that uses predetermined bias current values stored in memory rather than expensive real-time peak-detection hardware. This disposable-like calibration method pre-determines optimal values and applies them directly, avoiding the need for continuous complex monitoring circuits.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If peak-detection circuits are added to identify optimum bias current, then phase noise can be minimized, but tuning range is reduced due to additional capacitance

Engineering Contradiction:
Improvephase noise performanceVSAvoidtuning range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent removes the peak-detection circuitry that introduces parasitic capacitance, keeping only the essential bias current adjustment function. By extracting the core calibration capability without the bulky detection hardware, the tuning range is preserved while phase noise optimization is maintained through direct bias current control.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If calibration circuits are added to minimize phase noise, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improvebias current calibration accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs calibration actions in advance by pre-determining optimal bias current values and storing them in memory. This preliminary calibration eliminates the need for complex real-time measurement and adjustment circuits, achieving high measurement precision through pre-computed values rather than sophisticated measurement hardware.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7728679B2Calibration of voltage controlled oscillators
Publication Date: 2010.06.01 MICROCHIP TECHNOLOGY INC
  • US7728679B2 patent drawing
  • US7728679B2 patent drawing
  • US7728679B2 patent drawing

AI summary

A calibration circuit (20, 50) and method (60) for calibrating the bias current of a VCO (10, 40) to minimize phase noise. The calibration circuit (20, 50) monitors the average voltage at the common-mode node of the VCO (10, 40) while varying the bias current over a predetermined range. The calibration circuit (20, 50) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO (10, 40).