VCO Bias Control for Stable PLL Locking Across Wide Frequency Bands
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Solution Overview
Problem
Conventional Phase Locked Loop (PLL) circuits in semiconductor integrated circuits face challenges in achieving operational stability while maintaining short locking times and a wide frequency band, as voltage-controlled oscillators with large gains are sensitive to voltage variations but offer poor stability, and those with small gains have longer locking times and narrower frequency bands.
Innovation Solution
A phase synchronization apparatus that includes a voltage-controlled oscillator with multiple delay cells and a bias generation unit, which generates pull-up and pull-down bias voltages based on control signals, allowing the oscillator to operate with a small gain and select a usable frequency band, thereby stabilizing operations and preventing frequency band narrowing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a voltage controlled oscillator with a large gain is used, then locking time is shortened, but operational stability deteriorates due to sensitivity to voltage variations
Solution Approach 1:
The patent applies dynamics by making the gain of the voltage controlled oscillator adjustable rather than fixed. The gain control unit dynamically adjusts the gain based on operational conditions, allowing the system to switch between high gain (for short locking time) and low gain (for high stability) modes as needed.
Solution Approach 2:
The patent changes the gain parameter of the voltage controlled oscillator from a fixed value to an adjustable parameter. By varying the gain parameter according to operational requirements, the system can optimize both locking time and operational stability without being constrained by a single gain value.
2Reliability
If a voltage controlled oscillator with a small gain is used, then operational stability is improved, but locking time increases and frequency band narrows
Solution Approach 1:
The system dynamically adjusts the gain parameter based on operational phase and requirements. During initial acquisition, high gain is applied for fast locking; during steady-state operation, low gain maintains stability. This dynamic adjustment resolves the contradiction between fast locking and stable operation.
Solution Approach 2:
The gain control operates in periodic phases: initially applying high gain for rapid phase acquisition, then transitioning to low gain for stable tracking. This periodic switching of gain levels allows the system to achieve both short locking time and high operational stability at different stages.
3Speed
If a voltage controlled oscillator with a large gain is used, then locking speed increases, but frequency band sensitivity to voltage variations increases
Solution Approach 1:
The patent changes the gain parameter from fixed to variable, allowing the system to select appropriate gain levels for different frequency bands and operational conditions. This parameter adjustment capability enables fast locking when needed while maintaining frequency band stability in other operating modes.
Data Source
AI summary
A phase synchronization apparatus includes a bias control unit configured to sequentially delay an input clock signal to generate bias control signals having multiple bits, a bias generation unit configured to generate a pull-up bias voltage having a level that corresponds to logical values of the bias control signals, and to generate a pull-down bias voltage in response to a control signal; and a voltage controlled oscillator configured to include a plurality of delay cells respectively having a pull-up terminal and a pull-down terminal to generate an output clock signal in response to the control voltage, wherein the pull-up bias voltage is supplied to the pull-up terminals of the respective delay cells and the pull-down bias voltage is supplied to the pull-down terminals of the respective delay cells.