VCO Biasing Circuit with Stored Control Voltage for Low-Noise Power Saving

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Solution Overview

Problem

Traditional methods for reducing power consumption in voltage-controlled oscillators (VCOs) often result in increased noise, degrading their performance, which is a concern for energy-efficient designs in handheld devices.

Innovation Solution

An energy-efficient biasing circuit that switches between normal-power and reduced-power operating modes, using a control bias current and storing control voltage to minimize power consumption while maintaining performance, primarily through the use of MOSFETs and capacitors to manage current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If traditional power reduction methods are applied to VCOs, then power consumption is reduced, but noise increases and performance degrades

Engineering Contradiction:
Improvepower consumptionVSAvoidperformance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The biasing circuit operates in periodic cycles, switching between normal-power mode and reduced-power mode. During normal-power mode, the circuit generates control voltage with full bias current. During reduced-power mode, the circuit maintains the control voltage using a capacitor while consuming minimal power, thereby reducing average power consumption without continuous performance degradation

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The capacitor stores the control voltage in advance during normal-power mode before transitioning to reduced-power mode. This preliminary action of charging the capacitor ensures that when power is reduced, the stored voltage continues to bias the VCO properly, maintaining performance while reducing power consumption

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If bias current is reduced to save power, then energy efficiency improves, but noise increases

Engineering Contradiction:
Improveenergy efficiencyVSAvoidnoise
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The biasing circuit dynamically adjusts its operating state by switching between normal-power and reduced-power modes based on system requirements. This dynamic operation allows the circuit to optimize the balance between power consumption and noise generation, achieving energy efficiency during reduced-power mode while maintaining low noise during normal-power mode when needed

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces power consumption in VCOs while minimizing noise, thereby maintaining or improving performance, especially in handheld devices where energy efficiency is critical.

Implementation Method 1

By storing the control voltage using a device, such as a capacitor, much of the biasing circuit may be turned off during the reduced-power operating mode

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7852168B1Power-efficient biasing circuit
Publication Date: 2010.12.14 MARVELL ASIA PTE LTD
  • US7852168B1 patent drawing
  • US7852168B1 patent drawing
  • US7852168B1 patent drawing

AI summary

Energy-efficient timing circuits are described. Such circuits may include a biasing circuit configured to provide a control bias current to a voltage-controlled oscillator (VCO). The biasing circuit may repetitively switch between a normal-power operating mode and a reduced-power operating mode. During the normal-power operating mode, the biasing circuit may generate a control voltage representative of a desired control bias current for the VCO. By then storing the control voltage using a device, such as a capacitor, much of the biasing circuit may be turned off during the reduced-power operating mode.