VCO Buffer Capacitive Switching for High-Swing Reliability
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Solution Overview
Problem
Voltage controlled oscillators (VCOs) in wireless communication systems face challenges in maintaining reliability and low current consumption, especially under high voltage swing conditions, where voltage swings do not scale with process and can lead to reliability issues like hot carrier injection and gate oxide breakdown, and existing solutions like fixed resistive or capacitive dividers impact phase noise and lack mode-dependent operability.
Innovation Solution
A VCO buffer circuit design that includes capacitors and switches controlled by a comparator to adjust capacitance values based on oscillating voltage amplitude, switching between high and low swing modes to manage voltage swings at the gates of PMOS and NMOS transistors, reducing swing variation and phase noise while maintaining reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed resistive or capacitive dividers are used to reduce voltage swing, then device reliability is improved, but phase noise performance deteriorates
Solution Approach 1:
The patent employs dynamic switching between different capacitor configurations based on the operating mode (high swing or low swing). Switches control the connection of capacitors C1-C4 to adjust the total capacitance at the VCO buffer input, thereby dynamically optimizing both phase noise performance and device reliability according to the current operating conditions rather than using fixed divider values
Solution Approach 2:
The invention changes the capacitance parameter of the input network by switching between different capacitor combinations. In high swing mode, larger capacitance values are used to reduce voltage swing and improve reliability, while in low swing mode, smaller capacitance values are used to maintain phase noise performance, thus adapting parameters to different operating requirements
2Reliability
If voltage swing is reduced to improve reliability, then device reliability is improved, but signal amplitude performance deteriorates
Solution Approach 1:
The system dynamically adjusts the capacitance values in the VCO buffer input network based on the detected operating mode. During high swing conditions, larger capacitances are engaged to reduce the voltage swing at transistor gates and improve reliability, while during low swing conditions, smaller capacitances are used to maintain adequate signal amplitude, thus dynamically balancing reliability and signal performance
Solution Approach 2:
The input capacitance is segmented into multiple capacitors (C1-C4) that can be independently switched into the circuit. This segmentation allows flexible combination of capacitance values to achieve the desired balance between voltage swing reduction for reliability and maintaining sufficient signal amplitude for performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces voltage swing at the transistors' gates during high swing modes, enhancing device reliability and phase noise performance while minimizing current consumption, and is adaptable to different operating modes and feature sizes.
Implementation Method 1
A voltage controlled oscillator (VCO) buffer circuit includes a first capacitor, C1, connected to an input of the VCO buffer. The circuit also includes a second capacitor, C2, connected to the input of the VCO buffer and a gate of a p-type metal-oxide-semiconductor field effect (PMOS) transistor. The circuit further includes a third capacitor, C3, connected to the input of the VCO buffer and a fourth capacitor, C4, connected to the input of the VCO buffer and a gate of an n-type metal-oxide-semiconductor field effect (NMOS) transistor.
Data Source
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AI summary
A circuit for a voltage controlled oscillator (VCO) buffer is described. The circuit includes a first capacitor connected to an input of the VCO buffer that is connected to a VCO core. The circuit also includes a second capacitor connected to the input of the VCO buffer and the gate of a p-type metal-oxide-semiconductor field effect (PMOS) transistor. The circuit further includes a first switch connected to the first capacitor and the gate of the PMOS transistor. The circuit also includes a third capacitor connected to the input of the VCO buffer. The circuit further includes a fourth capacitor connected to the input of the VCO buffer and the gate of an n-type metal-oxide-semiconductor field effect (NMOS) transistor. The circuit also includes a second switch connected to the third capacitor and the gate of the NMOS transistor.