VCO Tank Capacitance Compensation for Low Phase Noise

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Solution Overview

Problem

Voltage controlled oscillators experience phase noise deterioration in the low frequency band due to current source fluctuations, which are exacerbated by parasitic capacitance changes in MOSFETs, requiring an increased current source area to mitigate flicker noise.

Innovation Solution

Incorporating PMOS capacitors to adjust parasitic capacitances in the tank circuit, reducing frequency fluctuations and phase noise by compensating for current source noise, while also minimizing the current source area through the use of PMOS capacitors and variable capacitance elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the area of the current source is increased to prevent flicker noise, then phase noise in the low frequency band is improved, but the device area increases

Engineering Contradiction:
Improvephase noise performanceVSAvoidcurrent source area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent introduces PMOS capacitors as intermediary elements connected to the tank circuit. These capacitors compensate for the effects of current source fluctuations and parasitic capacitance changes, thereby improving phase noise performance without requiring an increased current source area. The PMOS capacitors act as a mediator that counteracts the harmful effects of current noise and parasitic effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes variable capacitance elements whose capacitance values can be adjusted to optimize the tank circuit's performance. By dynamically changing the capacitance parameters, the system can compensate for parasitic capacitance variations and current source fluctuations, achieving low phase noise without increasing the current source area.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If parasitic capacitance of MOSFET is reduced to improve frequency stability, then phase noise is improved, but transistor design becomes more complex

Engineering Contradiction:
Improvefrequency stabilityVSAvoidtransistor design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The PMOS capacitors serve as intermediary elements that compensate for parasitic capacitance effects without requiring complex transistor design modifications. By adding these external capacitance elements, the system achieves frequency stability while maintaining relatively simple transistor designs.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the parasitic capacitance compensation function from the transistor design itself and implements it through separate PMOS capacitor elements. This separation allows the transistors to maintain their original simple design while the compensation function is handled by dedicated capacitance elements.

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-affected harmful factors

If current source area is increased to reduce flicker noise, then noise sensitivity is reduced, but device integration density decreases

Engineering Contradiction:
Improvenoise sensitivityVSAvoidcurrent source area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The PMOS capacitors act as intermediary elements that reduce the noise sensitivity of the oscillation circuit without requiring an increased current source area. These capacitors filter and compensate for noise effects, achieving low noise performance while maintaining compact device integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces phase noise in the low frequency band and minimizes the current source area by correcting parasitic capacitance changes, thereby improving frequency stability and reducing noise sensitivity.

Implementation Method 1

A voltage controlled oscillator includes a current source and a MOSFET typically having a parasitic capacitance. In such a voltage controlled oscillator, when a current of the current source fluctuates, an amplitude of the current changes and thus the parasitic capacitance of the MOSFET changes, so that an oscillation frequency thereof fluctuates.

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Implementation Method 2

a first variable capacitance unit connected in parallel with the first inductor, the first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit

Methodology Applied
Scientific EffectVoltage-controlled capacitance: Capacitance

Data Source

PatentUS11258403B2Voltage controlled oscillator, semiconductor integrated circuit, and transmission and reception device
Publication Date: 2022.02.22 KIOXIA CORP
  • US11258403B2 patent drawing
  • US11258403B2 patent drawing
  • US11258403B2 patent drawing

AI summary

A voltage controlled oscillator includes a first inductor; a first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit; a cross-coupled unit including a first transistor and a second transistor, an output of the first transistor connected to an input of the second transistor; a current source configured to flow a current through the first inductor, the first transistor, and the second transistor; a second variable capacitance unit including a third variable capacitance element having a variable capacitance, and a fourth variable capacitance element having a variable capacitance; and a second node different from the first node configured for application of a second voltage to the second variable capacitance unit.