VCO-Based Delay-Locked Loop for Low-Noise Clock Multiplication
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Solution Overview
Problem
Conventional delay-locked loops (DLLs) face challenges in multiplying a reference frequency by an arbitrary integer value while minimizing noise and spurs in the output clock signal, particularly due to the use of tap-controlled delay lines which introduce unwanted delays and make programmability difficult.
Innovation Solution
A DLL design that employs a voltage-controlled oscillator (VCO) instead of tap-controlled delay lines, allowing the frequency of the output oscillation signal to be adjusted to an integer multiple of the input oscillation signal by comparing phases and generating control voltage to align edges, thereby reducing noise and spurs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tap-controlled delay lines are used for frequency multiplication, then the output signal can be delay-locked with the input signal, but unwanted delays are introduced and spurs are generated in the output clock signal
Solution Approach 1:
The patent extracts and removes the tap-controlled delay line component from the DLL circuit, replacing it with a VCO-based frequency multiplication approach. This eliminates the source of unwanted delays and spurs while maintaining the delay-lock functionality through phase detection and control voltage adjustment.
Solution Approach 2:
The patent substitutes the mechanical/electrical tap-controlled delay line system with an electronic VCO system. The VCO generates the output signal whose frequency is controlled by a control voltage, replacing the physical delay line structure with an electronically controllable oscillation system that avoids spur generation.
2Reliability
If tap-controlled delay lines are used for frequency multiplication, then the output signal can be delay-locked with the input signal, but programmability of the multiplying factor is difficult to implement
Solution Approach 1:
The patent introduces dynamic controllability by using a VCO whose oscillation frequency can be continuously adjusted via control voltage. This replaces the static, fixed-delay tap line structure with a dynamic system where the multiplication factor can be programmed and changed in real-time through voltage control, enabling flexible adaptability.
Solution Approach 2:
The patent changes the control parameter from fixed physical delay settings to adjustable control voltage levels. By varying the control voltage applied to the VCO, the output frequency can be dynamically adjusted to achieve different multiplication factors, making the system programmable and adaptable to different frequency requirements.
3Area of stationary object
If a VCO is used instead of tap-controlled delay lines, then circuit area is reduced and programmability is improved, but the phase noise characteristics must be carefully controlled
Solution Approach 1:
The patent implements a feedback loop where the output signal from the VCO is fed back to the phase detector, which compares it with the input signal and generates a control voltage that adjusts the VCO frequency. This closed-loop feedback system automatically corrects phase deviations and suppresses phase noise, ensuring stable frequency multiplication while maintaining compact circuit area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces circuit area, minimizes distortion, and eliminates duty cycle errors, enabling more stable and programmable frequency multiplication with reduced noise and spurs in the output clock signal.
Implementation Method 1
The VCO, which includes an input for signaling to the VCO to begin oscillation and an input to receive the control voltage, generates the output oscillation signal
Implementation Method 2
The phase detector, which includes inputs to receive a reference signal and a feedback signal, generates UP and DN control signals in response to a phase difference between the reference signal and the feedback signal
Implementation Method 3
The charge pump, which is coupled to the phase detector, generates a control voltage in response to the UP and DN control signals
Data Source
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Figure 3A
AI summary
A delay-locked loop (DLL) circuit is disclosed that can generate an output oscillation signal having a frequency that is an integer multiple of an input oscillation signal. The DLL includes a phase detector, a charge pump, and a voltage-controlled oscillator (VCO). The phase detector generates UP and DN control signals in response to a phase difference between a reference signal and a feedback signal. The charge pump generates a control voltage in response to the UP and DN control signals. The VCO adjusts the frequency of the output oscillation signal in response to the control voltage, generates the reference signal in response to the input oscillation signal, and generates the feedback signal in response to the output oscillation signal.