VCO Gain Control Using Dual Oscillation Paths for Low Jitter

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Solution Overview

Problem

The increasing operating speed of multimedia systems requires high-frequency clock signals, but the reduced voltage level during manufacturing of clock generators leads to degraded jitter characteristics in voltage-controlled oscillators (VCOs) due to increased VCO gain.

Innovation Solution

A voltage-controlled oscillator (VCO) with a voltage regulator and delay unit, where the voltage regulator independently receives and combines oscillation control signals to generate a regulated voltage signal, which is fed back to control the VCO's gain, enhancing jitter characteristics by individually controlling the gain through multiple oscillation control signals from different paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the feature size used during manufacturing decreases, then the voltage level of supply voltage decreases, but the gain of VCO increases which degrades jitter characteristic

Engineering Contradiction:

Improvefeature sizeVSAvoidjitter characteristic

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The oscillation control signal is divided into two separate signals (first and second oscillation control signals) that are generated through different signal paths. These signals are then combined in a voltage regulator to control the VCO gain, allowing independent optimization of each path to achieve both high frequency and low jitter characteristics

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A voltage regulator is introduced as an intermediary component between the oscillation control signals and the VCO. This regulator combines multiple control signals and provides a regulated voltage signal to the VCO, enabling precise control of VCO gain and improving jitter characteristics while maintaining the benefits of scaled manufacturing

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If high frequency clock signals are required to increase system operating speed, then data processing speed increases, but VCO gain increases which degrades jitter characteristic

Engineering Contradiction:

Improvesystem operating speedVSAvoidjitter characteristic

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The control signal is segmented into two separate oscillation control signals that traverse different signal paths before being combined. This segmentation allows the system to achieve high frequency operation while maintaining precise control over VCO gain through the voltage regulator, thereby preventing jitter degradation even at high operating speeds

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts the VCO gain by combining multiple oscillation control signals through the voltage regulator. This dynamic control mechanism allows the system to operate at high frequencies required for fast data processing while actively managing and optimizing the jitter characteristics in real-time

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8031027B2Voltage-controlled oscillator, phase-locked loop (PLL) circuit, and clock generator

Publication Date: 2011.10.04 SAMSUNG ELECTRONICS CO LTD

AI summary

A voltage-controlled oscillator includes a voltage regulator, and a delay unit. The voltage regulator independently receives a first oscillation control signal and a second oscillation control signal to provide a regulated voltage signal which is represented by a regular ratio of combination of the first and second oscillation control signals, and the regulated voltage signal is feedback to the voltage regulator. The delay unit generates an output signal having a frequency varying in response to the regulated voltage signal.