Timing Recovery Loop Integral Hold for VCO Overshoot Control
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Solution Overview
Problem
Timing recovery systems face issues with frequency overshoot and loss of coherence between timing and frequency reference signals, particularly when transitioning between different time reference sources or during holdover modes in GPSDO systems, leading to potential transmission errors and anomalies.
Innovation Solution
A timing and frequency reference system (TFRS) utilizing a proportional-integral (PI) control system and a frequency offset limiter to discipline the frequency of a voltage-controlled oscillator (VCO), along with a reference validation and selection circuit (RVSC) to monitor and select the most suitable time reference source, preventing excess frequency deviation and maintaining coherence between timing and frequency reference signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PI control system is used to discipline VCO frequency in accordance with a time reference signal, then timing recovery and coherence between timing and frequency reference signals is improved, but frequency overshoot and excess deviation can occur when transitioning between time reference sources
Solution Approach 1:
The patent applies preliminary action by monitoring the control signal output voltage to detect conditions that will prospectively cause excess frequency deviation before it occurs. The system locks the integral error term generator output in advance when threshold violations are detected, preventing frequency overshoot before it can happen during transitions between time reference sources.
Solution Approach 2:
The patent implements feedback by continuously monitoring the control signal output voltage of the PI control system and using this information to control the locking of the integral error term generator. When the monitored voltage indicates potential excess deviation, the system provides feedback to lock the integral term, thereby preventing frequency overshoot and maintaining stable VCO frequency discipline.
2Stability of the object's composition
If the integral error term generator output is locked to prevent excess frequency deviation, then frequency stability is improved, but the system response time to correct timing errors is reduced
Solution Approach 1:
The patent applies dynamics by making the integral error term generator output lockable rather than fixed. The system dynamically adjusts between locked and unlocked states based on real-time monitoring of the control signal output voltage. This allows the system to maintain frequency stability when needed while preserving the ability to respond quickly to timing errors when the lock is released.
Solution Approach 2:
The patent changes the operational parameter of the integral error term generator from a static locked state to a dynamic state that can be locked or unlocked based on system conditions. By monitoring control signal output voltage and changing the lock state accordingly, the system optimizes both frequency stability and timing convergence speed under different operating conditions.
Data Source
AI summary
Limiting frequency overshoot in a timing recovery loop involves using a proportional-integral (PI) control system to discipline a frequency of an output signal of a voltage controlled oscillator (VCO) in accordance with a time reference signal. A control signal output of the PI control system is monitored to detect conditions which will prospectively cause an excess deviation of the VCO frequency. In response to detecting such a condition, an output of an integral error term generator of the PI control system is locked or held constant. This will have the effect of preventing the excess frequency deviation of the VCO.