VCO Timing Circuit With Switched-Capacitor Locking for Low EMI

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Solution Overview

Problem

Current systems face challenges in generating symmetrical high-frequency timing signals for Controller Area Network (CAN) communications, leading to undesired electromagnetic radiation due to voltage spikes and phase differences, which affect data integrity and energy efficiency.

Innovation Solution

The proposed solution involves a circuit that locks a voltage-controlled oscillator (VCO) to high frequencies using a low frequency quotient and a switched capacitor to resistor circuit, generating a control signal that introduces jitter in the high frequency signal, thereby distributing it across a wider frequency band and reducing amplitude spikes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If conventional oscillators are used to generate high frequency timing signals, then frequency accuracy can be maintained, but voltage spikes and phase differences occur causing electromagnetic radiation

Engineering Contradiction:
Improveelectromagnetic radiationVSAvoiddata integrity
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies dynamics by using a voltage-controlled oscillator (VCO) whose frequency can be dynamically adjusted through a control voltage. The frequency is modulated using delta-sigma modulation to distribute energy across a wider frequency band, transforming the static high-frequency signal into a dynamic one that avoids concentrated voltage spikes and reduces electromagnetic radiation while maintaining timing accuracy for CAN communications.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the frequency parameter of the oscillator dynamically through control voltage adjustment. By using delta-sigma modulation, the control voltage varies the VCO frequency in a controlled manner, spreading the spectral energy and eliminating the sharp frequency peaks that cause electromagnetic radiation, thereby resolving the contradiction between reliability and harmful emissions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high frequency timing signals are used to generate symmetrical transmitted signals, then data integrity is improved, but energy consumption increases due to voltage spikes

Engineering Contradiction:
Improvedata integrityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent uses dynamic frequency modulation via a VCO controlled by a delta-sigma modulator. This dynamic approach spreads the signal energy over time and frequency, avoiding concentrated voltage spikes that waste energy, while still providing the high-frequency timing needed for symmetrical signal generation and accurate CAN data transmission.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent converts what would normally be harmful high-frequency voltage spikes into beneficial spectral spreading. The delta-sigma modulation intentionally introduces controlled variations that distribute energy across a wider bandwidth, transforming potential electromagnetic interference into a mechanism that maintains data integrity while reducing peak energy consumption and harmful radiation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If external oscillators are used to achieve high frequency stability, then frequency accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by using a voltage-controlled oscillator that can tune its own frequency based on control voltage input. The delta-sigma modulator automatically adjusts the control voltage to achieve the desired center frequency and spectral distribution, eliminating the need for external crystal oscillators or complex frequency synthesis circuits while maintaining frequency stability through feedback control.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the oscillator's frequency parameter dynamically through voltage control rather than using fixed external oscillators. This allows the system to achieve high frequency stability and accuracy through electronic control and modulation, reducing device complexity by replacing mechanical or external components with integrated voltage-controlled circuitry.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively generates symmetrical high-frequency timing signals that minimize electromagnetic radiation, improve data integrity, and reduce energy consumption, while maintaining frequency accuracy and stability across varying conditions.

Implementation Method 1

resistor to switched capacitor matching

Methodology Applied
Scientific EffectSwitched capacitor to resistance conversion: Capacitance

Data Source

PatentUS11539328B2Timing circuit for locking a voltage controlled oscillator to a high frequency by use of low frequency quotients and resistor to switched capacitor matching
Publication Date: 2022.12.27 SEMICON COMPONENTS IND LLC
  • US11539328B2 patent drawing
  • US11539328B2 patent drawing
  • US11539328B2 patent drawing

AI summary

Devices, systems, and methods for locking a voltage controlled oscillator (VCO) at a high frequency may include use of a VCO and an integrator, which generates and outputs a control signal to the VCO, based on an inverting signal and a reference signal. The control signal locks the VCO to a high frequency signal (FH). A frequency divider is coupled to the VCO, receives FH from the VCO, divides FH by a factor “F”, and outputs a low frequency signal (FL). A switched capacitor resistor circuit (SCRC) is coupled to the frequency divider and the integrator. The SCRC receives FL from the frequency divider and generates the inverting signal. An integrating capacitor is coupled across an inverting and an output terminal of op-amp in the integrator. The output of the op-amp provides an integrator signal, which may be (optionally) filtered to produce the control signal.