Mid-band PSRR Circuit for VCO Noise Compensation
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Solution Overview
Problem
Voltage supply noise significantly impacts the phase-noise performance of voltage controlled oscillators (VCOs) in phase-locked loops (PLLs), degrading device performance and signal quality due to amplification by active circuitry and stray capacitances, with existing solutions failing to effectively reduce mid-band power supply rejection ratio (PSRR) without affecting loop dynamics or phase-noise performance.
Innovation Solution
A noise-reduction circuit using two transistors with mismatched transconductance, where one transistor has double the transconductance of the other, generates a compensation signal to eliminate supply noise in the VCO, comprising a series connection of transistors with a resistor coupled to the gate of one transistor and a capacitor between the gate of the other, and a compensation capacitor to reduce supply noise in the VCO output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If voltage supply noise is present in the VCO, then the VCO output signal contains noise that degrades device performance, but adding complex noise filtering circuits increases circuit complexity and may alter loop dynamics
Solution Approach 1:
The patent introduces a noise-reduction circuit as an intermediary component that generates a compensation signal to counteract supply noise. This circuit includes a first transistor connected to the VCO supply node and a second transistor whose drain connects to the VCO control node, acting as a mediator to inject the compensation signal without directly modifying the main VCO structure or loop dynamics.
Solution Approach 2:
The noise-reduction function is segmented into a separate, independent circuit module rather than being integrated into the main VCO core. This segmentation allows the noise reduction functionality to be added without increasing the complexity of the existing VCO circuitry, as the noise-reduction circuit operates independently and interfaces only at specific nodes.
2Reliability
If traditional PSRR compensation circuits are used, then supply noise rejection is improved, but the mid-band PSRR remains degraded and loop dynamics are altered
Solution Approach 1:
The patent applies local quality by providing targeted noise compensation specifically at the VCO control node through the second transistor, while leaving the rest of the PLL loop unchanged. The compensation signal is locally generated and injected only where needed (at the VCO control input), allowing supply noise rejection to be improved without affecting the overall loop dynamics and stability characteristics.
3Object-generated harmful factors
If the transconductance of transistors is mismatched, then a compensation signal is generated to counteract supply noise, but circuit design precision requirements increase
Solution Approach 1:
The patent deliberately employs asymmetry by designing the first and second transistors with different transconductance values (gm1 and gm2). This asymmetric design is intentional and functional, as the transconductance ratio directly determines the compensation signal magnitude needed to counteract supply noise. The asymmetry is controlled through transistor sizing rather than requiring precise matching, thereby reducing manufacturing precision requirements while still achieving effective noise compensation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces mid-band PSRR by approximately 10-15 dB without altering the PLL loop dynamics or impacting phase-noise performance, improving signal quality and reducing supply noise in VCOs without requiring additional area or power, and can be easily integrated into conventional VCO structures.
Implementation Method 1
the noise-reduction circuit includes two transistors with one having double the transconductance of the other in order to ensure the compensation signal is the polar opposite of the supply noise of the VCO
Data Source
AI summary
A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.