VCSEL Mode Control via Amorphous Silicon Phase Perturbation

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Solution Overview

Problem

Existing VCSEL technologies face challenges in suppressing higher order modes while maintaining single-mode operation, particularly in high-power applications, due to limitations in precision etching and damage to the top reflector DBR stack during fabrication processes.

Innovation Solution

The use of a dielectric filter, such as an amorphous silicon layer, is introduced on top of the VCSEL to suppress higher order modes by creating a phase perturbation, allowing for single-mode lasing over a wide range of input currents without requiring precise etching or additional semiconductor layer growth, and combining with zinc diffusion to control mode selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If surface relief method is used to suppress higher order modes, then mode suppression is achieved, but manufacturing precision requirements increase due to need for precise etching

Engineering Contradiction:
Improvemode suppressionVSAvoidetch precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An amorphous silicon layer is introduced as an intermediary element between the VCSEL cavity and the external environment. This layer serves as the phase-mismatch structure for mode suppression without requiring precise etching of the VCSEL's DBR stack, thereby resolving the contradiction between achieving reliable mode suppression and maintaining manufacturing precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical/chemical etching process (which requires high precision) with a deposition process for forming the amorphous silicon layer. This substitution eliminates the need for precise removal of material and replaces it with a more controllable deposition and patterning process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If ion milling is used to remove GaAs anti-phase layer, then precise etch depth is achieved, but damage occurs to the top reflector DBR stack

Engineering Contradiction:
Improveetch depth precisionVSAvoidDBR stack damage
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The amorphous silicon layer acts as a mediator that provides the necessary phase mismatch for mode suppression without requiring direct modification or removal of portions of the DBR stack, thereby avoiding damage to this critical component while still achieving the desired optical effect

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the phase-mismatch function from the DBR stack structure itself and places it in a separate amorphous silicon layer. This separation allows the DBR stack to remain intact and undamaged while still achieving the necessary optical phase disruption for higher mode suppression

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If extra GaAs layer is used for mode suppression, then phase mismatch is achieved, but device complexity increases due to additional epitaxial growth requirements

Engineering Contradiction:
Improvephase mismatchVSAvoidepitaxial structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from crystalline GaAs to amorphous silicon for the phase-mismatch layer. This parameter change allows the layer to be formed through deposition processes rather than requiring complex epitaxial growth, thereby reducing device complexity while maintaining the necessary phase mismatch effect

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables high-power single-mode operation by increasing the threshold gain for higher order modes, ensuring the fundamental mode lases first and remains the only mode over a significant current range, enhancing output power and facilitating miniaturization in applications like Energy Assisted Magnetic Recording.

Implementation Method 1

The use of a dielectric filter, such as an amorphous silicon layer, is introduced on top of the VCSEL to suppress higher order modes by creating a phase perturbation

Methodology Applied
Scientific EffectPhase perturbation: Interference

Implementation Method 2

This perturbation results in destructive interference for any portion of the standing wave of a transverse mode that impinges on the GaAs, increasing the cavity loss for said mode

Methodology Applied
Scientific EffectOptical absorption: Absorption (EM radiation)

Data Source

PatentUS10381803B2Mode control in vertical-cavity surface-emitting lasers
Publication Date: 2019.08.13 THE BOARD OF TRUSTEES OF THE UNIV OF ILLINOIS
  • US10381803B2 patent drawing
  • US10381803B2 patent drawing
  • US10381803B2 patent drawing

AI summary

Aspects of the subject disclosure may include, for example, a first distributed Bragg reflector, a second distributed Bragg reflector, an active region with an oxide aperture between the first and second distributed Bragg reflectors, and a dielectric layer, where a positioning of the dielectric layer with respect to the first and second distributed Bragg reflectors and the oxide aperture causes suppression of higher modes of the vertical-cavity surface-emitting laser device. Other embodiments are disclosed.