VCSEL Array Column Switching for Low-RLC Pulse Driving
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Solution Overview
Problem
VCSELs face challenges in achieving ideal pulse driving due to the adverse effects of resistance, inductance, and capacitance within the package, which hinder precise optical output for applications in image-forming apparatuses like LiDAR, facial recognition, and augmented/virtual reality devices.
Innovation Solution
A VCSEL package with a GaN FET driver and common anode/cathode structures, minimizing the effects of resistance, inductance, and capacitance by optimizing the electrical connections and substrate doping, and using a VCSEL array with series or parallel connections in columns, along with a GaN FET switch to control operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If VCSELs are connected with conventional electrical connections in the package, then the package structure is simple, but the resistance, inductance, and capacitance adversely affect pulse driving performance and optical output precision
Solution Approach 1:
The VCSEL array is divided into multiple columns with series connections within each column, allowing independent control of different column groups. This segmentation enables precise pulse driving of specific columns while reducing the adverse effects of RLC parameters on the entire array, thereby improving pulse driving performance without requiring complete redesign of all electrical connections.
Solution Approach 2:
The patent transitions from conventional two-dimensional planar electrical connections to a three-dimensional structure by stacking VCSEL columns vertically and implementing series connections within columns. This dimensional change reduces the horizontal trace length and associated RLC effects, improving pulse driving performance while maintaining a compact package structure.
2Measurement precision
If VCSELs are driven with ideal pulse driving, then the optical output precision is maximized, but the resistance, inductance, and capacitance in the package prevent ideal pulse driving
Solution Approach 1:
The patent implements different connection configurations for different columns (series connections within columns, parallel connections between columns). This local quality approach allows optimization of pulse driving characteristics for each column group, minimizing the adverse effects of RLC parameters on optical output precision while maintaining overall system performance.
Solution Approach 2:
The patent changes the electrical connection parameters (series/parallel configuration) to alter the effective resistance, inductance, and capacitance values seen by each column group. By adjusting these parameters, the system achieves better pulse driving characteristics and improved optical output precision despite the inherent RLC effects in the package.
3Reliability
If VCSELs are connected in series within columns, then the pulse driving performance improves, but the voltage requirement increases
Solution Approach 1:
The VCSEL array is segmented into multiple columns that can be controlled independently. By dividing the array into manageable column groups with series connections, the system achieves improved pulse driving performance for each group while the overall voltage requirement is distributed across multiple independently controllable segments.
Solution Approach 2:
The patent introduces control switches as intermediaries between the power source and each column group. These switches enable precise control of voltage application to series-connected VCSEL columns, improving pulse driving performance while managing the voltage requirement through controlled switching rather than continuous high voltage application.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the quality and operation of output light, allowing for improved optical properties and efficient pulse driving, reducing the impact of RLC effects and facilitating high-speed modulation and integration.
Implementation Method 1
a first reflective layer positioned on the first substrate and comprising a plurality of distributed Bragg reflector (DBR) pairs; a second reflective layer positioned above the first reflective layer and comprising a plurality of DBR pairs
Implementation Method 2
a first substrate doped with a first polar dopant; a cavity layer positioned between the first reflective layer and the second reflective layer, wherein a hole generated in one of the first reflective layer and the second reflective layer and an electron generated in the other are recombined
Implementation Method 3
an oxide layer positioned between the cavity layer and the first or second reflective layer to determine characteristics of a to-be-output laser and a diameter of an opening
Data Source
AI summary
Disclosed is a VCSEL array having m rows and n columns. Each of VCSELs includes a first substrate doped with a first polar dopant, a first reflective layer comprising a plurality of distributed Bragg reflector (DBR) pairs, a second reflective layer comprising a plurality of DBR pairs, a cavity layer positioned between the first reflective layer and the second reflective layer, an oxide layer positioned between the cavity layer and the first or second reflective layer to determine characteristics of a to-be-output laser and a diameter of an opening, an insulating layer coated on the second reflective layer to protect the first reflective layer, the second reflective layer, the cavity layer, and the oxide layer from the outside, a first electrode electrically connected to the second reflective layer, supplying power to the second reflective layer, and a second electrode positioned at a lower end of the first substrate.