VCSEL Array Layout With Tight Pitch and Thermal Crosstalk Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing VCSEL arrays face challenges in achieving high power output while accommodating tight-pitch packing, leading to thermal crosstalk and high thermal load density, which affect performance and require innovative designs to overcome these issues.
Innovation Solution
The development of independently-addressable VCSEL architectures with improved laser array designs, chip tiling, and mounting and cooling architectures that include direct die attachment to a 3D submount with integrated cooling channels, along with asymmetric aperture shapes and common anode addressing, enable high power output at resolutions greater than 300 dpi.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If VCSELs are packed into tight-pitch arrays to achieve high resolution (300-1200 dpi), then the linear pitch between lasers is reduced to enable high-resolution printing and mapping applications, but thermal crosstalk becomes problematic as heat from each laser affects the performance of nearby lasers
Solution Approach 1:
The patent transitions from planar 2D VCSEL array packaging to three-dimensional stacked packaging, where multiple VCSEL layers are vertically arranged on the same substrate. This dimensional change allows significantly reduced linear pitch between lasers in the horizontal plane while maintaining adequate thermal spacing through vertical separation, thereby achieving high-resolution packing without excessive thermal crosstalk.
Solution Approach 2:
The VCSEL array is divided into multiple independent layers, with each layer containing a subset of VCSELs. This segmentation allows thermal management to be applied layer-by-layer, reducing the thermal load on any single VCSEL and minimizing thermal crosstalk between adjacent lasers while maintaining high overall density.
2Power
If VCSEL aperture size is increased to support high light output (50 mW), then the light-emitting area is enlarged to achieve requisite power output, but the overall device size becomes larger and cannot accommodate tight-pitch packing
Solution Approach 1:
The patent achieves high power output by stacking multiple VCSEL layers vertically rather than increasing the aperture size of individual VCSELs. Each VCSEL in the stack can maintain a small aperture suitable for tight-pitch packing, while the aggregate power output of all layers combined delivers the required 50 mW or higher, effectively moving the power scaling from horizontal aperture expansion to vertical layer multiplication.
Solution Approach 2:
Multiple low-power VCSELs are merged into a single stacked array structure, where their individual light outputs combine to achieve high total power output. This merging allows each individual VCSEL to remain small in size while the collective array delivers high power, resolving the contradiction between aperture size and device compactness.
3Productivity
If a large number of high power lasers operate within a small region to achieve high density arrays, then the aggregate electrical power drop increases and leads to high thermal load density that must be dissipated
Solution Approach 1:
The patent distributes thermal load across multiple vertical layers rather than concentrating it in a single planar layer. This three-dimensional thermal distribution reduces the thermal density at any given location, allowing high array density to be achieved while maintaining manageable thermal loads that can be effectively dissipated through the substrate and heat sinks.
Solution Approach 2:
The thermal management system is segmented to handle each VCSEL layer independently, with dedicated thermal pathways and heat dissipation structures for each layer. This segmentation prevents thermal accumulation and reduces overall thermal load density, enabling high-density arrays to operate reliably without excessive heat buildup.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These designs allow for high power VCSEL arrays to operate efficiently with tight-pitch packing, reducing thermal crosstalk and maintaining performance by effectively managing heat, enabling applications such as high-resolution printing, facial recognition, and lidar systems.
Implementation Method 1
VCSELs are semiconductor-based lasers that can emit light perpendicular to a substrate
Implementation Method 2
mounting and cooling architectures that include direct die attachment to a 3D submount with integrated cooling channels
Implementation Method 3
integrated cooling channels
Data Source
AI summary
A semiconductor surface-emitting laser array can be provided with a group of independently addressable light-emitting pixels arranged in at least two rows and in a linear array on a common substrate chip and including a common cathode and a dedicated channel associated with an address trace line for each pixel. An aggregate linear pitch can be achieved between pixels of the at least two rows along the linear array in a cross process direction that is less than the size of a pixel. The semiconductor laser array can include more than one common substrate chip tiled and stitched together in a staggered arrangement to provide an at least 11-inch wide, 1200 dpi imager with timing delays associated with each of the more than one common substrate chip in the staggered arrangement.