VCSEL Array Layout With Vertical Routing for Irregular Emitters

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Solution Overview

Problem

Existing VCSEL arrays with intermixed and irregular emitter locations face complications in design and processing, including capacitance issues, emitter power uniformity, and dielectric breakdown, particularly in multi-channel configurations.

Innovation Solution

A method for designing multi-channel VCSEL arrays with intermixed emitters using a bottom RDL and insulation layer to simplify layout and reduce RDL layers, ensuring effective isolation and reduced capacitance between channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If VCSEL arrays use intermixed and irregular emitter locations to increase channel density, then the quantity of emitters per array increases, but capacitance between channels increases and dielectric breakdown risk increases

Engineering Contradiction:
Improvenumber of emitters per arrayVSAvoiddielectric breakdown risk
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the VCSEL array into multiple independent sub-arrays, each with its own dedicated contact. This segmentation isolates the emitters into separate groups that can be independently addressed, reducing the capacitance between channels and eliminating dielectric breakdown risks while maintaining high emitter density through irregular positioning within each sub-array.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar RDL routing to a vertical stacking architecture where sub-arrays are arranged in multiple layers along the vertical dimension. Each sub-array has direct vertical access to its contact, eliminating the need for complex lateral RDL routing and reducing inter-channel capacitance while allowing irregular emitter positions within each sub-array.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If traditional RDL routing is used to connect emitters to contacts, then layout flexibility is maintained, but the number of RDL layers increases and manufacturing complexity increases

Engineering Contradiction:
Improvelayout flexibilityVSAvoidnumber of RDL layers
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of routing contacts laterally through multiple RDL layers as in traditional designs, the patent inverts the approach by providing direct vertical access from each sub-array to its dedicated contact. This eliminates the need for complex lateral RDL routing while maintaining layout flexibility through the ability to position sub-arrays irregularly in the horizontal plane and stack them vertically.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent resolves the routing complexity by moving the connection path from the horizontal plane (through multiple RDL layers) to the vertical dimension, where each sub-array connects directly to its contact through a vertical via. This dimensional change eliminates the need for multiple overlapping RDL layers while preserving layout flexibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If emitters are positioned irregularly to optimize performance, then emitter power uniformity improves, but design and processing complexity increases

Engineering Contradiction:
Improveemitter power uniformityVSAvoiddesign and processing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

By dividing the array into independent sub-arrays with irregular emitter positions within each sub-array, the patent simplifies the design and processing. Each sub-array can be independently optimized for uniform power distribution without requiring complex global routing, as each emitter has direct vertical access to its contact through the via structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250385483A1Vertical cavity surface emitting laser array
Publication Date: 2025.12.18 II VI DELAWARE INC
  • US20250385483A1 patent drawing
  • US20250385483A1 patent drawing
  • US20250385483A1 patent drawing

AI summary

This disclosure describes a device having a plurality vertical cavity surface emitting lasers (VCSELs) that are addressable in groups. The device has a bottom RDL that is able to electrically couple a first group of VCSELs to a first bond pad through to a bond pad via. The device also has a top RDL that is able to electrically couple a second group of VCSELs to a second bond pad through a group of VCSEL vias. Each VCSEL of the second group of VCSELs is electrically coupled to a corresponding VCSEL via of the group of VCSEL vias. Furthermore, the plurality of VCSEL may be positioned in any manner including randomly.